Apparatuses and methods for transposing select gates
AssigneeMicron Technology, Inc.
InventorToru Tanzawa
Life of this patent
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Abstract
Apparatuses and methods for transposing select gates, such as in a computing system and/or memory device, are provided. One example apparatus can include a group of memory cells and select gates electrically coupled to the group of memory cells. The select gates are arranged such that a pair of select gates are adjacent to each other along a first portion of each of the pair of select gates and are non-adjacent along a second portion of each of the pair of select gates.
Claims39
An apparatus, comprising:
- a group of memory cells;
- and
- select gates electrically coupled to the group of memory cells, wherein the select gates are arranged such that a pair of select gates is adjacent to each other along a first portion of each of the pair of select gates and are non-adjacent along a second portion of each of the pair of select gates,
- wherein the respective select gates of each pair of the select gates are transposed with one another at least once.
An apparatus, comprising:
- a number of memory cells;
- and
- N select gates electrically coupled to the number of memory cells, N being greater than 1, each select gate being separated into M segments, M being greater than 1,
- wherein at least some of the N select gates are transposed with one another at least once and the M segments of the N select gates are arranged such that less than M segments of a first select gate are adjacent to segments of a second select gate.
An apparatus, comprising:
- memory cells arranged in 3-dimensional memory cell strings;
- and
- select gates electrically coupled to the memory cells,
- wherein the select gates are separated into segments, the segments being arranged in a two-dimensional matrix, positions on the matrix being referenced by coordinates (i,j), and
- wherein a select gate segment at (i,j) is electrically coupled to a select gate segment at (i+1,j+1) and a select gate segment at (i,j+1) is electrically coupled to a select gate segment at (i+1,j).
An apparatus, comprising:
- a group of memory cells;
- and
- select gates electrically coupled to the group of memory cells,
- wherein at least one pair of the select gates has a transposition thereof such that a first one of the select gates of the pair of select gates is adjacent a third one of the select gates on a first side of the transposition and a second one of the select gates of the pair of select gates is adjacent the third one of the select gates on a second side of the transposition.
An apparatus, comprising:
- a group of memory cells;
- select gates electrically coupled to the group of memory cells, a pair of the select gates including a transposition thereof;
- and
- data lines electrically coupled to the select gates,
- wherein the transposition includes first conductive material of a first select gate being routed between segments of first conductive material of a second select gate, the segments of first conductive material of the second select gate being electrically coupled by an interconnect formed of a second conductive material routed over the first conductive material of the first select gate, and wherein the data lines are formed of a third conductive material.
An apparatus, comprising:
- a group of memory cells;
- and
- select gates electrically coupled to the group of memory cells, each of the select gates being separated into segments, a pair of the select gates including a transposition thereof,
- wherein the transposition includes a first interconnect between respective segments of a first select gate and a second interconnect between respective segments of a second select gate.
A method of forming transposed select gates, comprising:
- forming a select gate first conductive material into a matrix of segments in two dimensions;
- and
- forming a corresponding second conductive material over each segment, the corresponding second conductive material being electrically coupled near a respective end of each segment,
- wherein segments are coupled together into select gates traversing one of the two dimensions.
Dependencies are inferred from the claim text.