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US 8,796,773 B2Granted
Metal gate and high-K dielectric devices with PFET channel SiGe
AssigneeInternational Business Machines Corporation
InventorsKangguo Cheng, Bruce B. Doris, Keith Kwong Hon Wong
Life of this patent
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Abstract
In a circuit structure, PFET devices have a gate dielectric including a high-k dielectric, a gatestack with a metal, a p-source/drain and silicide layer formed over the p-source/drain; NFET devices include a gate dielectric including a high-k dielectric, a gatestack with a metal, an n-source/drain and silicide layer formed over the n-source/drain. An epitaxial SiGe is present underneath and in direct contact with the PFET gate dielectric, while the epitaxial SiGe is absent underneath the NFET gate dielectric.
Claims6
A circuit structure, comprising:
- a substrate having a Si principal surface;
- at least one PFET device, comprising:
- a PFET gate dielectric, which PFET gate dielectric comprises a first high-k dielectric, a PFET gatestack, which PFET gatestack comprises a first metal, a p-source/drain, and a first silicide layer formed over said p-source/drain;
- at least one NFET device, comprising:
- an NFET gate dielectric, which NFET gate dielectric comprises a second high-k dielectric, an NFET gatestack, which NFET gatestack comprises a second metal, an n-source/drain, and a second silicide layer formed over said n-source/drain;
- and
- an epitaxial SiGe overlaying and in direct contact with said Si principal surface, wherein said epitaxial SiGe is present underneath and in direct contact with said PFET gate dielectric, and wherein said epitaxial SiGe is absent underneath said NFET gate dielectric, wherein both said NFET device and said PFET device comprise sidewall spacers, and said epitaxial SiGe is present underneath, and in direct contact with said sidewall spacers of both said NFET device and said PFET device.
4 more elements
Dependencies are inferred from the claim text.