US 8,796,760 B2Granted

Transistor and method of manufacturing the same

AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.

InventorsChih-Chang Cheng, Fu-Yu Chu, Ruey-Hsin Liu

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Abstract

A manufacture includes a doped layer, a body structure over the doped layer, a trench defined in the doped layer, an insulator partially filling the trench, and a first conductive feature buried in, and separated from the doped layer and the body structure by, the insulator. The doped layer has a first type doping. The body structure has an upper surface and includes a body region. The body region has a second type doping different from the first type doping. The trench has a bottom surface. The first conductive feature extends from a position substantially leveled with the upper surface of the body structure toward the bottom surface of the trench. The first conductive feature overlaps the doped layer for an overlapping distance, and the overlapping distance ranging from 0 to 2 μm.

Claims20

Dependent claims

A manufacture, comprising:

a doped layer having a first type doping, the doped layer defining a trench therein, and the trench having a bottom surface;
a body structure over the doped layer, the body structure having an upper surface and comprising a body region, and the body region having a second type doping different from the first type doping;
an insulator partially filling the trench;
a first conductive feature buried in, and separated from the doped layer and the body structure by, the insulator, the first conductive feature extending from a position substantially leveled with the upper surface of the body structure toward the bottom surface of the trench, the first conductive feature overlapping the doped layer for an overlapping distance;
and
a second conductive feature buried in, and separated from the first conductive feature and the bottom surface of the trench by, the insulator, the second conductive feature having an extended portion not overlapping the first conductive feature, and the extended portion extending toward the bottom surface of the trench.

3 more elements

A method of forming a manufacture, the method comprising:

forming a trench in a doped layer, the trench having an upper portion and a lower portion, and a width of the upper portion being greater than that of the lower portion;
forming a first insulating layer along sidewalls of the lower portion of the trench and a bottom surface of the trench;
forming a gate dielectric layer along sidewalls of the upper portion of the trench;
forming a first conductive feature along sidewalls of the gate dielectric layer;
converting an upper portion of the doped layer into a body structure, the remaining doped layer below the body structure having a first type doping, and the body structure having a body region, and the body region having a second type doping different from the first type doping;
forming a first region in the body structure, the first region having the second type doping, and conductivity of the first region being higher than that of the body region of the body structure;
and
forming a second region in the body structure, the second region having the first type doping.

5 more elements

A transistor comprising:

a doped layer having a first type doping and defining a plurality of trenches therein;
a body structure over the doped layer, the body structure having an upper surface and comprising:
a body region, and the body region having a second type doping different from the first type doping;
a body contact region having the second type doping, and conductivity of the body contact region being higher than that of the body region;
and
a source region having the first type doping;
and
a plurality of transistor cells, each transistor cell being formed in a corresponding one of the plurality of trenches and comprising:
an insulator partially filling the trench, the trench having a bottom surface;
a gate electrode buried in, and separated from the doped layer and the body structure by, the insulator, the gate electrode extending from a position substantially leveled with the upper surface of the body structure toward the bottom surface of the trench, the gate electrode overlapping the doped layer for an overlapping distance,
and;
a source electrode buried in, and separated from the gate electrode and the bottom surface of the trench, by the insulator, the source electrode having an extended portion not overlapping the gate electrode, and the extended portion extending toward the bottom surface of the trench.

9 more elements

Dependencies are inferred from the claim text.

Facts

Application: 13/420,248Filed 14 Mar 2012
Published: US 2013/0240984 A119 Sep 2013
Granted: 5 Aug 2014
Term ends: Not estimatedThe source records don’t support an estimate.

Classification19 codes

H10D 30/663
Vertical dmos [vdmos] fets: having both source contacts and drain contacts on the same surface, i.e. up-drain VDMOS
H10D 30/025
Of FETs having insulated gates [IGFET]: of vertical IGFETs
H10D 30/0297
Of vertical dmos [vdmos] fets: using recessing of the gate electrodes, e.g. to form trench gate electrodes
H10D 30/63
Insulated-gate field-effect transistors [IGFET]: vertical IGFETs