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US 8,796,751 B2Granted
Transistors, memory cells and semiconductor constructions
AssigneeMicron Technology, Inc.
InventorsNirmal Ramaswamy, Kirk D. Prall, Wayne Kinney
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AssigneeMicron Technology, Inc.
InventorsNirmal Ramaswamy, Kirk D. Prall, Wayne Kinney
Estimating the term…
Some embodiments include a semiconductor construction having a gate extending into a semiconductor base. Conductively-doped source and drain regions are within the base adjacent the gate. A gate dielectric has a first segment between the source region and the gate, a second segment between the drain region and the gate, and a third segment between the first and second segments. At least a portion of the gate dielectric comprises ferroelectric material. In some embodiments the ferroelectric material is within each of the first, second and third segments. In some embodiments, the ferroelectric material is within the first segment or the third segment. In some embodiments, a transistor has a gate, a source region and a drain region; and has a channel region between the source and drain regions. The transistor has a gate dielectric which contains ferroelectric material between the source region and the gate.
A semiconductor construction, comprising:
A transistor, comprising:
A semiconductor construction, comprising:
Dependencies are inferred from the claim text.
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Characterised by the insulator, e.g. by the gate insulator: having ferroelectric layers
In which the volatile element is a DRAM cell: and the nonvolatile element is a ferroelectric element
DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells: the transistor being at least partially in a trench in the substrate
Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory transistors: characterised by the memory core region
About 6 years 1 month of term left · ends 20 Nov 2032 (estimated)
Transistors, memory cells and semiconductor constructions.
Memory is one type of integrated circuitry, and is used in computer systems for storing data. Integrated memory is usually fabricated in one or more arrays of individual memory cells. The memory cells may be volatile, semi-volatile, or nonvolatile. Nonvolatile memory cells can store data for extended periods of time, and in some instances can store data in the absence of power. Volatile memory dissipates and is therefore refreshed/rewritten to maintain data storage.
The memory cells are configured to retain or store information in at least two different selectable states. In a binary system, the states are considered as either a “0” or a “1”. In other systems, at least some individual memory cells may be configured to store more than two selectable states of information.
FIG. 1 is a diagrammatic cross-sectional view of a portion of a semiconductor construction illustrating an example embodiment transistor incorporated into an example embodiment memory cell.
FIG. 2 diagrammatically illustrates the memory cell of FIG. 1 in two different example memory states.
FIGS. 3-7 diagrammatically illustrate example embodiment transistors incorporated into example embodiment memory cells.
Some embodiments include transistors which comprise ferroelectric material incorporated into gate dielectric. In some embodiments, such transistors may be incorporated into memory cells. Example embodiments are described with reference to FIGS. 1-8.
Referring to FIG. 1, an example embodiment memory cell 40 is illustrated as part of a semiconductor construction 10.
The construction 10 includes a base 12. The base 12 may comprise semiconductor material, and in some embodiments may comprise, consist essentially of, or consist of monocrystalline silicon. In some embodiments, base 12 may be considered to comprise a semiconductor substrate. The term “semiconductor substrate” means any construction comprising semiconductive material, including, but not limited to, bulk semiconductive materials such as a semiconductive wafer (either alone or in assemblies comprising other materials), and semiconductive material layers (either alone or in assemblies comprising other materials). The term “substrate” refers to any supporting structure, including, but not limited to, the semiconductor substrates described above. In some embodiments, base 12 may correspond to a semiconductor substrate containing one or more materials associated with integrated circuit fabrication. Some of the materials may be under the shown region of base 12 and/or may be laterally adjacent the shown region of base 12; and may correspond to, for example, one or more of refractory metal materials, barrier materials, diffusion materials, insulator materials, etc.