US 8,796,729 B2Granted

Junction-isolated blocking voltage devices with integrated protection structures and methods of forming the same

AssigneeAnalog Devices, Inc.

InventorsDavid J Clarke, Javier Alejandro Salcedo, Brian B Moane, Juan Luo, Seamus Murnane, Kieran K Heffernan, John Twomey, Stephen Denis Heffernan, Gavin Patrick Cosgrave

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Abstract

Junction-isolated blocking voltage devices and methods of forming the same are provided. In certain implementations, a blocking voltage device includes an anode terminal electrically connected to a first p-well, a cathode terminal electrically connected to a first n-well, a ground terminal electrically connected to a second p-well, and an n-type isolation layer for isolating the first p-well from a p-type substrate. The first p-well and the first n-well operate as a blocking diode. The blocking voltage device further includes a PNPN silicon controlled rectifier (SCR) associated with a P+ region formed in the first n-well, the first n-well, the first p-well, and an N+ region formed in the first p-well. Additionally, the blocking voltage device further includes an NPNPN bidirectional SCR associated with an N+ region formed in the first p-well, the first p-well, the n-type isolation layer, the second p-well, and an N+ region formed in the second p-well.

Claims20

Dependent claims

An apparatus comprising:

a p-type substrate;
a first p-type well disposed in the p-type substrate, wherein the first p-type well comprises at least one p-type active region and at least one n-type active region electrically connected to a first terminal;
a first n-type well disposed in the p-type substrate adjacent the first p-type well, wherein the first n-type well comprises at least one p-type active region and at least one n-type active region electrically connected to a second terminal;
a second p-type well disposed in the p-type substrate, wherein the second p-type well comprises at least one p-type active region and at least one n-type active region electrically connected to a third terminal;
and
an n-type isolation layer beneath the first p-type well, the first n-type well, and at least a portion of the second p-type well,
wherein the first p-type well and the first n-type well are configured to operate as a blocking diode,
wherein the at least one p-type active region of the first n-type well, the first n-type well, the first p-type well, and the at least one n-type active region of the first p-type well are configured to operate as a PNPN silicon controlled rectifier, and
wherein the at least one n-type active region of the first p-type well, the first p-type well, the n-type isolation layer, the second p-type well, and the at least one n-type active region of the second p-type well are configured to operate as an NPNPN bidirectional silicon controlled rectifier.

6 more elements

An apparatus comprising:

a blocking diode including an anode electrically connected to a first terminal and a cathode electrically connected to a second terminal;
a first PNP bipolar transistor including an emitter electrically connected to the second terminal, a base, and a collector;
a first NPN bipolar transistor including an emitter electrically connected to the first terminal, a base electrically connected to the collector of the first PNP bipolar transistor, and a collector electrically connected to the base of the first PNP bipolar transistor;
a second NPN bipolar transistor including an emitter electrically connected to a third terminal, a base, and a collector;
and
a bidirectional PNP bipolar transistor including an emitter/collector electrically connected to the base of the second NPN bipolar transistor, a collector/emitter eclectically connected to the base of the first NPN bipolar transistor, and a base electrically connected to the collectors of the first and second NPN bipolar transistors,
wherein the first PNP bipolar transistor and the first NPN bipolar transistor are configured to operate as a PNPN silicon controlled rectifier, and
wherein the first NPN bipolar transistor, the bidirectional PNP bipolar transistor, and the second NPN bipolar transistor are configured to operate as an NPNPN bidirectional silicon controlled rectifier.

5 more elements

Dependencies are inferred from the claim text.

Facts

Application: 13/682,284Filed 20 Nov 2012
Published: US 2014/0138735 A122 May 2014
Granted: 5 Aug 2014
Term ends: Not estimatedThe source records don’t support an estimate.

Classification8 codes

H10D 89/60
Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00: integrated devices comprising arrangements for electrical or thermal…
H10D 18/021
Manufacture or treatment: of bidirectional devices, e.g. triacs
H10D 18/80
Thyristors: bidirectional devices, e.g. triacs
H10D 62/126
Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions: top-view geometrical layouts of…