Static random access memories having carbon nanotube thin films
AssigneesSamsung Electronics Co., Ltd., Sungkyunkwan University Foundation for Corporate Collaboration
InventorsEun-hong Lee, Un-jeong Kim, Woo-jong Yu, Young-hee Lee
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Abstract
A static random access memory (SRAM) includes: a first carbon nanotube (CNT) inverter, a second CNT inverter, a first switching transistor, and a second switching transistor. The first CNT inverter includes at least a first CNT transistor. The second CNT inverter is connected to the first CNT inverter and includes at least one second CNT transistor. The first switching transistor is connected to the first CNT inverter. The second switching transistor is connected to the second CNT inverter.
Claims17
A static random access memory (SRAM) comprising:
- a first carbon nanotube (CNT) inverter including at least a first CNT transistor;
- a second CNT inverter connected to the first CNT inverter, the second CNT inverter including at least a second CNT transistor;
- a first switching transistor connected to at least the first CNT inverter;
- and
- a second switching transistor connected to at least the second CNT inverter;
- wherein at least one of the first and second CNT transistors comprises
- an insulating layer directly formed on a substrate;
- source and drain electrodes directly formed on the insulating layer, the source and drain electrodes being spaced apart from one another;
- a CNT channel directly formed on the insulating layer between the source and drain electrode;
- a gate insulating layer formed on the CNT channel and the source and drain electrodes such that the gate insulating layer partially overlaps the source and drain electrodes;
- and
- a gate electrode formed on the gate insulating layer, wherein the source and drain electrodes and the CNT channel directly contact the insulation layer.
A static random access memory (SRAM) comprising:
- at least two carbon nanotube (CNT) inverters connected to one another, each CNT inverter having at least two CNT transistors connected in series between a supply voltage and ground;
- wherein at least one of the at least two CNT transistors comprises
- an insulating layer directly formed on a substrate;
- source and drain electrodes directly formed on the insulating layer, the source and drain electrodes being spaced apart from one another;
- a CNT channel directly formed on the insulating layer between the source and drain electrode;
- a gate insulating layer formed on the CNT channel and the source and drain electrodes such that the gate insulating layer partially overlaps the source and drain electrodes;
- and
- a gate electrode formed on the gate insulating layer, wherein the source and drain electrodes and the CNT channel directly contact the insulation layer.
A static random access memory (SRAM) comprising:
- at least two carbon nanotube (CNT) inverters, each CNT inverter having at least two CNT transistors connected between a supply voltage and ground, the at least two transistors being configured such that each CNT inverter is one of a CMOS-type and enhancement-load type inverter;
- wherein at least one of the at least two CNT transistors comprises
- an insulating layer directly formed on a substrate;
- source and drain electrodes directly formed on the insulating layer, the source and drain electrodes being spaced apart from one another;
- a CNT channel directly formed on the insulating layer between the source and drain electrode;
- a gate insulating layer formed on the CNT channel and the source and drain electrodes such that the gate insulating layer partially overlaps the source and drain electrodes;
- and
- a gate electrode formed on the gate insulating layer, wherein the source and drain electrodes and the CNT channel directly contact the insulation layer.
Dependencies are inferred from the claim text.