Semiconductor memory device
AssigneeKabushiki Kaisha Toshiba
InventorNobuaki Yasutake
Life of this patent
Estimating the term…
Abstract
A memory cell comprises a diode layer, a variable resistance layer, a first electrode layer. The diode layer functions as a rectifier element. The variable resistance layer functions as a variable resistance element. The first electrode layer is provided between the variable resistance layer and the diode layer. The first electrode layer comprises a titanium nitride layer configured by titanium nitride. Where a first ratio is defined as a ratio of titanium atoms to nitrogen atoms in a first region in the titanium nitride layer and a second ratio is defined as a ratio of titanium atoms to nitrogen atoms in a second region which is in the titanium nitride layer and is nearer to the variable resistance layer than is the first region, the second ratio is larger than the first ratio.
Claims13
A semiconductor memory device, comprising memory cells disposed between a first line and a second line and including a variable resistance element, the memory cells comprising:
- a first electrode layer provided between the variable resistance element and the first line,
- the first electrode layer including a titanium nitride layer configured by titanium nitride, and, when a first ratio is defined as a ratio of titanium atoms to nitrogen atoms in a first region in the titanium nitride layer and a second ratio is defined as a ratio of titanium atoms to nitrogen atoms in a second region which is in the titanium nitride layer and is nearer to the variable resistance element than is the first region, the second ratio being larger than the first ratio.
Dependencies are inferred from the claim text.