Semiconductor devices with vertical structure including data storage layer or pattern

A semiconductor device comprising:

• a substrate having an upper surface;
• horizontal patterns stacked on the upper surface of the substrate, the horizontal patterns including a first horizontal electrode pattern, a molding pattern disposed on the first horizontal electrode pattern, and a second horizontal electrode pattern disposed on the molding pattern;
• and
• a vertical structure extending vertically through the horizontal patterns, wherein the vertical structure comprises:
• a vertical electrode pattern having a lateral surface,
• a data storage pattern interposed between the vertical electrode pattern and the horizontal patterns and extending along the lateral surface of the vertical electrode pattern, and
• a buffer pattern interposed between the data storage pattern and the molding pattern, wherein the buffer pattern is disposed at a level above the upper surface of the substrate different than the levels at which the first and second horizontal electrode patterns are disposed above the upper surface of the substrate.

A semiconductor device, comprising:

• a substrate having an upper surface;
• horizontal layers stacked on the upper surface of the substrate, the horizontal layers including horizontal electrode layers spaced one above the other on a substrate;
• and
• a vertical structure extending vertically through the horizontal layers, wherein the vertical structure comprises:
• a vertical electrode,
• a data storage layer extending around the vertical electrode, and
• vertically spaced apart segments of a buffer layer interposed between the data storage layer and each of the horizontal electrode layers, respectively, wherein the segments of the buffer layer are of material comprising silicon oxide, insulating nitride or silicon oxynitride (SiON).