Method for fabricating semiconductor device by damascene process
AssigneeHynix Semiconductor Inc.
InventorJae-Seon Yu
Life of this patent
Estimating the term…
Abstract
A method for fabricating a semiconductor device includes forming a plurality of isolation patterns, isolated from each other by a plurality of trenches, over an underlying structure; forming a plurality of conductive lines filled in the trenches, forming contact holes by removing first portions of the isolation patterns, wherein the contact holes are defined by the plurality of conductive lines and second portions of the isolation patterns that remain after removing of the first portions of the isolation patterns, and forming plugs filled in the contact holes.
Claims13
A method for fabricating a semiconductor device, the method comprising:
- forming a plurality of sacrificial patterns, isolated from each other by a plurality of trenches, over an underlying structure;
- forming a plurality of conductive lines filled in the trenches;
- forming first holes by removing portions of the sacrificial patterns, wherein remaining portions of the sacrificial patterns as a whole extend in a direction crossing the conductive lines, and the first holes are defined by the plurality of conductive lines and the remaining portions of the sacrificial patterns;
- forming isolation patterns filled in the first holes;
- forming contact holes by removing the remaining portions of the sacrificial patterns, wherein the contact holes are defined by the plurality of conductive lines and the isolation patterns;
- and
- forming plugs filled in the contact holes.
A method for fabricating a semiconductor device, the method comprising:
- forming a plurality of sacrificial patterns, isolated from each other by a plurality of trenches, over an underlying structure;
- forming a plurality of conductive lines filled in the plurality of trenches;
- forming a plurality of first holes by removing portions of the sacrificial patterns, wherein remaining portions of the sacrificial patterns as a whole extend in a direction crossing the conductive lines, and the first holes are defined by the plurality of conductive lines and the remaining portions of the sacrificial patterns;
- forming isolation patterns filled in the plurality of first holes;
- forming contact holes by removing the remaining portions of the sacrificial patterns, wherein the contact holes are defined by the plurality of conductive lines and the isolation patterns;
- forming a spacer having an air gap on the sidewalls of the contact holes;
- and
- forming plugs filled in the contact holes.
A method for fabricating a semiconductor device, the method comprising:
- forming an insulating layer and an etch stop layer over an underlying structure;
- forming a plurality of sacrificial patterns, isolated from each other by a plurality of trenches, on the etch stop layer;
- forming a plurality of bit lines filled in the plurality of trenches;
- forming a plurality of first holes by removing portions of the sacrificial patterns, wherein remaining portions of the sacrificial patterns as a whole extend in a direction crossing the conductive lines, and the first holes are defined by the plurality of conductive lines and the remaining portions of the sacrificial patterns;
- forming isolation patterns filled in the plurality of first holes;
- forming contact holes by removing the remaining portions of the sacrificial patterns, wherein the contact holes are defined by the plurality of bit lines and the isolation patterns;
- etching the etch stop layer and the insulating layer at the bottom of the contact holes;
- etching exposed sidewalls of the insulating layer;
- and
- forming storage node contact plugs filled in the contact holes.
Dependencies are inferred from the claim text.