Through substrate vias
AssigneeInternational Business Machiness Corporation
InventorsJohn Michael Cotte, Christopher Vincent Jahnes, Bucknell Chapman Webb
Life of this patent
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Abstract
Methods and apparatus for forming through-vias are presented, for example, a method for forming a via in a portion of a semiconductor wafer comprising a substrate. The method comprises forming a trench surrounding a first part of the substrate such that the first part is separated from a second part of the substrate, forming a hole through the substrate within the first part, and forming a first metal within the hole. The trench extends through the substrate. The first metal extends from a front surface of the substrate to a back surface of the substrate. The via comprises the hole and the first metal.
Claims16
A method for forming a via in a portion of a semiconductor wafer comprising a substrate, the method comprising the steps of:
- forming a front surface layer on a first surface of a semiconductor substrate, wherein the front surface layer comprises a first contact;
- forming a second contact through the semiconductor substrate in electrical contact with the first contact, wherein forming the second contact comprises:
- forming a trench in a second surface of the semiconductor substrate, opposite the first surface, the trench surrounding a first part of the substrate such that the first part is separated from a second part of the substrate, wherein the trench extends through the substrate from the second surface to the first surface of the semiconductor substrate;
- forming a hole through the substrate within the first part;
- forming at least one conformal metal layer to line the trench and hole;
- removing a portion of conformal metal layer in the trench to isolate a remaining portion of the conformal metal layer lining the hole;
- and
- filling the trench and hole with dielectric material,
- wherein the second contact is a via that comprises the hole and a portion of the conformal metal layer lining the hole.
A method for forming an integrated circuit comprising a via in a portion of a semiconductor wafer comprising a substrate, the method comprising the steps of:
- forming a front surface layer on a first surface of a semiconductor substrate, wherein the front surface layer comprises a first contact;
- forming a second contact through the semiconductor substrate in electrical contact with the first contact, wherein forming the second contact comprises:
- forming a trench in a second surface of the semiconductor substrate, opposite the first surface, the trench surrounding a first part of the substrate such that the first part is separated from a second part of the substrate, wherein the trench extends through the substrate from the second surface to the first surface of the semiconductor substrate;
- forming a hole through the substrate within the first part;
- forming at least one conformal metal layer to line the trench and hole;
- removing a portion of conformal metal layer in the trench to isolate a remaining portion of the conformal metal layer lining the hole;
- and
- filling the trench and hole with dielectric material,
- wherein the second contact is a via that comprises the hole and a portion of the conformal metal layer lining the hole.
Dependencies are inferred from the claim text.