Light-emitting diode arrangement and method for producing the same
AssigneeOSRAM Opto Semiconductors GmbH
InventorsJörg Erich Sorg, Stefan Gruber, Siegfried Herrmann, Berthold Hahn
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AssigneeOSRAM Opto Semiconductors GmbH
InventorsJörg Erich Sorg, Stefan Gruber, Siegfried Herrmann, Berthold Hahn
Estimating the term…
A light-emitting diode arrangement comprising a plurality of semiconductor chips which are provided for emitting electromagnetic radiation from their front side and which are fixed by their rear side—opposite the front side—on a first main face of a common carrier body, wherein the semiconductor chips consist of a respective substrateless semiconductor layer stack and are fixed to the common carrier body without an auxiliary carrier, and to a method for producing such a light-emitting diode arrangement.
A method for producing a light-emitting diode arrangement, comprising:
A method for producing a light-emitting diode arrangement, comprising:
A method for producing a light-emitting diode arrangement, comprising:
Dependencies are inferred from the claim text.
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Package configurations
Of bodies, e.g. forming semiconductor layers: bonding of wafers
Wavelength conversion means: having a non-uniform spatial arrangement or non-uniform concentration, e.g. patterned wavelength conversion layer or…
Packages: interconnections, e.g. lead-frames, bond wires or solder balls
About 3 years 5 months of term left · ends 22 Mar 2030 (estimated)
The invention relates to a light-emitting diode arrangement and to a method for producing the same.
Light-emitting diode arrangements are known wherein a plurality of individually encapsulated LED components are arranged on a common carrier. Such light-emitting diode arrangements have an inadequate luminance and an insufficiently uniform luminance distribution for many applications.
In other known light-emitting diode arrangements, individual LED chips comprising an active semiconductor layer stack and a growth substrate and/or an auxiliary carrier are arranged on a common carrier. Gaps remain between the individual semiconductor layer stacks during the mounting of such LED chips. The gaps are caused for example by the mounting method, for instance owing to a limited placement accuracy and/or an adhesive rim sideways of the growth substrate and/or auxiliary carrier. Active semiconductor layer stacks arranged on an auxiliary carrier generally do not completely cover the latter, whereby the size of the gaps between the active semiconductor layer stacks is increased further. The gaps lead to regions of reduced luminance in the luminous area of the light-emitting diode arrangement and to nonuniformities in the luminance distribution.
In the figures:
FIGS. 1A to 1C show schematic sectional illustrations of different stages of the method for producing a light-emitting diode arrangement in accordance with a first exemplary embodiment,
FIG. 2 shows a schematic sectional illustration of a detail from a light-emitting diode arrangement in accordance with a second exemplary embodiment;
In the figures, identical or identically acting constituent parts are in each case provided with the same reference symbols. The elements illustrated and their size relationships among one another should not be regarded as true to scale, in principle; rather, individual elements such as e.g. layers and/or distances may be illustrated with an exaggerated size and/or thickness for the sake of better representability and/or for the sake of a better understanding.
In the method for producing a light-emitting diode arrangement in accordance with the first exemplary embodiment, firstly a carrier body 2 is provided (see FIG. 1A). The carrier body in the present case is a printed circuit board (PCB). However, other carrier bodies are also conceivable. By way of example, as an alternative it is possible to use a plate as carrier body which comprises a plastic material, a glass, a ceramic material or a metal.
Subsequently, a plurality of fixing layers 3 is formed on a first main face 201 of the carrier body 2, that is to say on one of the areas of the carrier body 2 which are at least substantially parallel to the main extension plane of the carrier body 2. Each of the fixing layers 3 is arranged completely within a mounting region 230 of the carrier body 2. The mounting regions 230 are disjoint, that is to say that they do not overlap. The individual fixing layers 3 also do not mutually touch one another and they also do not overlap. By way of example, the fixing layers 3 contain a soldering metal, for example Sn, AgSn or AuSn, and are electrically conductively connected to a conductor track of an electrical connection conductor provided for making electrical contact with the semiconductor layer stacks (not shown). The conductor track is, in particular, a partial region of an electrically conductive layer 9 of the electrical connection conductor, said layer being formed on the first main face 201 of the carrier body 2. The layer thickness of the electrically conductive layer 9 is preferably less than or equal to 20 μm, particularly preferably less than or equal to 2 μm.