Method of manufacturing vertical planar power MOSFET and method of manufacturing trench-gate power MOSFET

A method of manufacturing a vertical planar power MOSFET comprising:

• (a) a silicon-based semiconductor substrate having a first main surface and a second main surface;
• (b) a drift region having a super junction structure in which a column region of a first conductivity type and a column region of a second conductivity type which are provided in the semiconductor substrate are alternately and repeatedly formed;
• (c) a drain region of the first conductivity type provided in a semiconductor back surface area of the semiconductor substrate closer to the second main surface;
• (d) a metal drain electrode provided over the second main surface of the semiconductor substrate;
• (e) a body region of the second conductivity type provided in a semiconductor top surface area of the semiconductor substrate closer to the first main surface;
• (f) a source region of the first conductivity type which is the semiconductor top surface area of the semiconductor substrate closer to the first main surface and provided in the body region;
• (g) a gate electrode provided over the first main surface of the semiconductor substrate via a gate insulating film;
• and
• (h) a metal source electrode provided over the first main surface of the semiconductor substrate so as to be electrically coupled to the source region,
• the method of manufacturing the vertical planar power MOSFET comprising the steps of:
• (x1) forming the super junction structure on the top surface side of the silicon-based wafer of the first conductivity type;
• (x2) forming a trench to be filled with the body region for embedding the body region in a surface of the super junction structure;
• and
• (x3) filling the trench to be filled with the body region by selective epitaxial growth.