# US 8,788,907 B2 · Memory chip for converting data received from controller controlling reading and writing of data

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- Number: US 8,788,907 B2
- Document ID: US8788907B2
- Status: Granted
- Kind: B2
- Application number: 13/924,675
- Filed: 2013-06-24
- Published: 2013-10-31
- Granted: 2014-07-22
- Earliest claimed: 2009-11-27
- Assignees: Kabushiki Kaisha Toshiba
- Applicants: Kabushiki Kaisha Toshiba
- Inventors: Toru Kambayashi; Akihiro Kasahara; Shinichi Matsukawa; Hiroyuki Sakamoto; Taku Kato; Hiroshi Sukegawa; Yoshihiko Hirose; Atsushi Shimbo; Koichi Fujisaki
- Web page: https://patentgrep.com/patent/US8788907B2

## CPC

- G06F 12/1466: {Key-lock mechanism}
- G06F 21/30: Authentication, i.e. establishing the identity or authorisation of security principals
- G06F 21/79: in semiconductor storage media, e.g. directly-addressable memories
- H04L 9/08: Key distribution {or management, e.g. generation, sharing or updating, of cryptographic keys or passwords (network architectures or network communication protocols for supporting key management in a packet data network H04L63/06)}
- H04L 9/0838: {Key agreement, i.e. key establishment technique in which a shared key is derived by parties as a function of information contributed by, or associated with, each of these (network architectures or network communication protocols for key exchange in a packet data network H04L63/061)}
- H04L 9/0897: {involving additional devices, e.g. trusted platform module [TPM], smartcard or USB}
- G06F 2212/1052: Security improvement
- G06F 2221/2107: File encryption
- H04L 2209/34: Encoding or coding, e.g. Huffman coding or error correction
- H04L 2463/062: applying encryption of the keys
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- H04L: TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION (arrangements common to telegraphic and telephonic communication H04M)

## Abstract

According to one embodiment, a memory chip, which is connected to a controller that controls reading and writing of data in response to a request from an external device, includes: a memory including a special area that is a predetermined data storage area; a key storage unit that stores therein a second key that corresponds to a first key used by the external device to convert the data; a converting unit that receives, from the controller, data to be written into the special area and generates converted data by converting the data to be written using the second key; and a writing unit that writes the converted data into the special area.

## Claims

### Claim 1

A memory chip connected to a controller that controls reading and writing of data in response to a request from an external device, the memory chip comprising:
a memory including a special area that is a predetermined data storage area;
a key storage that stores therein a second key that corresponds to a first key used by the external device to convert the data;
a converter that receives, from the controller, data to be written into the special area and generates converted data by converting the data to be written using the second key; and
a writer that writes the converted data into the special area.

### Claim 2 (depends on 1)

The memory chip according to claim 1, further comprising:
an encrypter that generates encrypted data by encrypting the converted data, which has been written into the special area, using an encryption key shared with the controller; and
a sender that sends the encrypted data to the controller.

### Claim 3 (depends on 1)

The memory chip according to claim 1, further comprising:
a code storage that stores therein an error correction code of the data to be written, wherein
the converter receives, from the controller, a converted code obtained by converting the error correction code of the data to be written using the first key and the data to be written that has been converted using the first key, converts the converted code into the error correction code using the second key, and generates the converted data by decrypting using the second key the data to be written that has been converted using the first key, and
the writer further stores the error correction code resulting from the decryption into the code storage.

### Claim 4 (depends on 1)

The memory chip according to claim 1, further comprising:
a code storage that stores therein an error correction code of the data to be written, wherein
the converter receives, from the controller, the error correction code of the data to be written and the data to be written, and converts the data to be written into the converted data using the second key, and
the writer further stores the received error correction code into the code storage.

### Claim 5

A memory chip connected to a controller that controls reading and writing of data in response to a request from an external device, the memory chip comprising:
a memory including a special area that is a predetermined data storage area;
a key storage that stores therein a second key that corresponds to a first key used by the external device to convert the data;
a writer that receives, from the controller, data to be written into the special area and writes the received data to be written into the special area; and
a converter that generates converted data by converting the data to be written, which has been written into the special area, using the second key.

### Claim 6 (depends on 5)

The memory chip according to claim 5, further comprising:
an encrypter that generates encrypted data by encrypting the converted data using an encryption key shared with the controller; and
a sender that sends the encrypted data to the controller.

### Claim 7 (depends on 5)

The memory chip according to claim 5, further comprising:
a code storage that stores therein an error correction code of the data to be written, wherein
the writer receives, from the controller, a converted code obtained by converting the error correction code of the data to be written using the first key and the data to be written, writes the received converted code into the code storage, and writes the received data to be written into the special area, and
the converter decrypts using the second key the converted code, which has been written into the special area, into the error correction code and decrypts using the second key the data to be written, which has been written into the special area, into the data to be written.

### Claim 8 (depends on 5)

The memory chip according to claim 5, further comprising:
a code storage that stores therein an error correction code of the data to be written, wherein
the writer receives, from the controller, the error correction code of the data to be written and the data to be written, writes the received error correction code into the code storage, and writes the received data to be written into the special area.

### Claim 9

A memory chip connected to a controller that controls reading and writing of data in response to a request from an external device, the memory chip comprising:
a memory including a special area that is a predetermined data storage area;
a key storage that stores therein a second key that corresponds to a first key used by the external device to convert the data; and
the memory chip configured,
to receive, from the controller, data to be written into the special area,
to generate converted data by converting the data to be written using the second key, and
to write the converted data into the special area.

### Claim 10 (depends on 9)

The memory chip according to claim 9, wherein the memory chip is further configured,
to generate encrypted data by encrypting the converted data, which has been written into the special area, using an encryption key shared with the controller; and
to send the encrypted data to the controller.

### Claim 11 (depends on 9)

The memory chip according to claim 9, further comprising:
a code storage that stores therein an error correction code of the data to be written; and
the memory chip configured,
to receive, from the controller, a converted code obtained by converting the error correction code of the data to be written using the first key and the data to be written that has been converted using the first key,
to convert the converted code into the error correction code using the second key,
to generate the converted data by decrypting using the second key the data to be written that has been converted using the first key, and
to store the error correction code resulting from the decryption into the code storage.

### Claim 12 (depends on 9)

The memory chip according to claim 9, further comprising:
a code storage that stores therein an error correction code of the data to be written; and
the memory chip configured,
to receive, from the controller, the error correction code of the data to be written and the data to be written,
to convert the data to be written into the converted data using the second key, and to store the received error correction code into the code storage.

### Claim 13

A memory chip connected to a controller that controls reading and writing of data in response to a request from an external device, the memory chip comprising:
a memory including a special area that is a predetermined data storage area;
a key storage that stores therein a second key that corresponds to a first key used by the external device to convert the data; and
the memory chip configured,
to receive from the controller, data to be written into the special area,
to write the received data to be written into the special area, and
to generate converted data by converting the data to be written, which has been written into the special area, using the second key.

### Claim 14 (depends on 13)

The memory chip according to claim 13, wherein the memory chip is further configured,
to generate encrypted data by encrypting the converted data using an encryption key shared with the controller, and
to send the encrypted data to the controller.

### Claim 15 (depends on 13)

The memory chip according to claim 13, further comprising:
a code storage that stores therein an error correction code of the data to be written; and
the memory chip configured,
to receive, from the controller, a converted code obtained by converting the error correction code of the data to be written using the first key and the data to be written,
to write the received converted code into the code storage,
to write the received data to be written into the special area,
to decrypt using the second key the converted code, which has been written into the special area, into the error correction code, and
to decrypt using the second key the data to be written, which has been written into the special area, into the data to be written.

### Claim 16 (depends on 13)

The memory chip according to claim 13, further comprising:
a code storage that stores therein an error correction code of the data to be written; and
the memory chip configured,
to receive, from the controller, the error correction code of the data to be written and the data to be written,
to write the received error correction code into the code storage, and
to write the received data to be written into the special area.