# US 8,788,906 B2 · Memory device with internal signal processing unit

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- Number: US 8,788,906 B2
- Document ID: US8788906B2
- Status: Granted
- Kind: B2
- Application number: 13/860,211
- Filed: 2013-04-10
- Published: 2013-08-29
- Granted: 2014-07-22
- Earliest claimed: 2007-05-12
- Assignees: Apple Inc.
- Applicants: Apple Inc.
- Inventors: Dotan Sokolov; Naftali Sommer; Uri Perlmutter; Ofir Shalvi
- Web page: https://patentgrep.com/patent/US8788906B2

## CPC

- G06F 11/1072: {in multilevel memories}
- G06F 11/1044: {with specific ECC/EDC distribution}
- G06F 11/1048: {using arrangements adapted for a specific error detection or correction feature}
- G06F 11/1076: {Parity data used in redundant arrays of independent storages, e.g. in RAID systems}
- G06F 12/00: Accessing, addressing or allocating within memory systems or architectures (digital input from, or digital output to record carriers, e.g. to disk storage units, G06F3/06)
- G11C 11/56: using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C 29/50004: {of threshold voltage}
- G11C 29/52: Protection of memory contents; Detection of errors in memory contents
- H03M 13/3707: {Adaptive decoding and hybrid decoding, e.g. decoding methods or techniques providing more than one decoding algorithm for one code}
- G11C 2029/5004: {Voltage}
- H03M 13/1102: {Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes}
- H03M 13/1515: {Reed-Solomon codes}
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- G11C: STATIC STORES (semiconductor memory devices H10B)
- H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C)

## Abstract

A method for operating a memory includes storing data in a plurality of analog memory cells that are fabricated on a first semiconductor die by writing input storage values to a group of the analog memory cells. After storing the data, multiple output storage values are read from each of the analog memory cells in the group using respective, different threshold sets of read thresholds, thus providing multiple output sets of the output storage values corresponding respectively to the threshold sets. The multiple output sets of the output storage values are preprocessed by circuitry that is fabricated on the first semiconductor die, to produce preprocessed data. The preprocessed data is provided to a memory controller, which is fabricated on a second semiconductor die that is different from the first semiconductor die. so as to enable the memory controller to reconstruct the data responsively to the preprocessed data.

## Claims

### Claim 1

An apparatus, comprising:
a memory controller, wherein the memory controller is fabricated on a first semiconductor die;
a memory device coupled to the memory controller, including:
a plurality of analog memory cells, and wherein the memory device is configured to store data into one or more of the plurality of analog cells;
a read/write circuit configured to:
store data into one or more of the plurality of analog memory cells; and
read storage values from the one or more of the plurality of analog memory cells; and
a processor configured to:
perform a preprocessing operation on the read storage values to generate preprocessed data;
send the preprocessed data to the memory controller;
wherein the memory device is fabricated on a second semiconductor die;
wherein to perform a preprocessing operation on the read storage values, the processor is further configured to determine a statistical property of the read storage values, wherein the statistical property includes a Cumulative Distribution Function (CDF) of the read storage values;
wherein the memory controller is configured to:
determine if the data can be reconstructed from the received preprocessed data; and
send feedback to the processor dependent upon the determination;
wherein the processor is further configured to modify the preprocessing operation dependent upon the feedback.

### Claim 2 (depends on 1)

The apparatus of claim 1, wherein the feedback comprises information indicative of past usage of read thresholds.

### Claim 3 (depends on 1)

The apparatus of claim 1, wherein the read/write circuit is further configured to read storage values from the one or more memory cells of the plurality of analog memory cells dependent upon one or more read thresholds, and wherein the perform the preprocessing operation, the processor is further configured to modify the one or more read thresholds.

### Claim 4

A method, comprising:
storing data in a plurality of analog memory cells;
receiving a request from a memory controller to retrieve the stored data from the plurality of analog memory cells;
retrieving storage values from the plurality of analog memory cells responsive to the received request;
preprocessing the retrieved storage values to generate preprocessed data; and
sending the preprocessed data to the memory controller;
wherein preprocessing the retrieved storage values comprises determining a statistical property of the retrieved storage values, wherein the statistical property includes a Cumulative Distribution Function (CDF) of the retrieved storage values.

### Claim 5

A method, comprising:
storing data in a plurality of analog memory cells;
receiving a request from a memory controller to retrieve the stored data from the plurality of analog memory cells;
retrieving storage values from the plurality of analog memory cells responsive to the received request;
preprocessing the retrieved storage values to generate preprocessed data; and
sending the preprocessed data to the memory controller;
wherein preprocessing the retrieved storage values comprises determining a statistical property of the retrieved storage values, wherein the statistical property includes a histogram of the retrieved storage values.

### Claim 6 (depends on 4)

The method of claim 4, wherein storing data in the plurality of analog memory cells comprises encoding the data with an Error Correction Code (ECC).

### Claim 7 (depends on 6)

The method of claim 6, wherein sending the preprocessed data to the memory controller comprises sending ECC metrics dependent upon the retrieved storage values to the memory controller.

### Claim 8 (depends on 4)

The method of claim 4, wherein sending the preprocessed data to the memory controller comprises sending the statistical property to the memory controller.

### Claim 9

A computer-accessible non-transitory storage medium having program instructions stored therein that, in response to execution by a processor, cause the processor to perform operations comprising:
storing data in one or more analog memory cells of a plurality of analog memory cells;
receiving from a memory controller, a request to retrieve the stored data;
receiving one or more analog control signals from the memory controller, wherein the analog control signals specify voltage or currents;
reading storage values from the one or more analog memory cells of the plurality of analog memory cells dependent upon the received analog control signals; and
sending the read storage values to the memory controller;
wherein reading the storage values from the one or more analog memory cells of the plurality of analog memory cells comprises estimating a statistical property of the read storage values, wherein the statistical property includes a Cumulative Distribution Function (CDF) of the read storage values.

### Claim 10 (depends on 9)

The computer-accessible non-transitory storage medium of claim 9, wherein storing data in the one or more analog memory cells of the plurality of analog memory cells comprises encoding the data with an Error Correction Code (ECC).

### Claim 11 (depends on 9)

The computer-accessible non-transitory storage medium of claim 9, wherein reading the storage values from the one or more analog memory cells of the plurality of memory cells comprises selecting one or more read thresholds dependent upon the received one or more analog control signals.

### Claim 12 (depends on 10)

The computer-accessible non-transitory storage medium of claim 10, wherein sending the read storage values to the memory controller comprises sending ECC metrics dependent upon the read storage values to the memory controller.