# US 8,788,870 B2 · Flat panel display driver method and system > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 8,788,870 B2 - Document ID: US8788870B2 - Status: Granted - Kind: B2 - Application number: 13/850,564 - Filed: 2013-03-26 - Published: 2013-08-22 - Granted: 2014-07-22 - Earliest claimed: 2009-05-13 - Assignees: STMicroelectronics S.r.l. - Applicants: STMicroelectronics, Inc. - Inventors: Alan Osamu Kobayashi - Web page: https://patentgrep.com/patent/US8788870B2 ## CPC - G06F 1/04: Generating or distributing clock signals or signals derived directly therefrom - G09G 5/006: {Details of the interface to the display terminal (specific for a display terminal using a CRT G09G1/167; using a flat panel G09G3/2096; circuits for interfacing with colour displays G09G5/04)} - G09G 2330/021: Power management, e.g. power saving - G09G 2370/10: Use of a protocol of communication by packets in interfaces along the display data pipeline - G09G 2370/14: Use of low voltage differential signaling [LVDS] for display data communication - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00) ## Abstract Methods and systems are described for enabling display system data transmission during use. An integrated circuit package includes input interface circuitry configured to receive an audio-video data stream having a video signal and timing information and timing extraction circuitry that can identify blanking patterns for the video signal. The package includes input processing circuitry for receiving audio-video signal and converting the audio-video data stream input into a low voltage differential signal (LVDS). The package includes a timing controller having timing extraction circuitry, a set of symbol buffers, a scheduler, and timing control circuitry. All configured to implement LVDS data transfer and in some implementation enable point to point data transfer from data buffers to associated column drivers. ## Claims ### Claim 1 An integrated circuit configured to operate in a video display device, the integrated circuit comprising: input processing circuitry configured to receive incoming audio-video signal comprising an audio-video data stream having embedded timing information associated with the audio-video data of the audio-video data stream and convert the audio-video data stream into an output signal; timing controller configured to receive the output signal comprising: timing extraction circuitry for receiving the output signal comprising a stream of data symbols, the circuitry configured to identify a timing pattern for the output signal using the embedded timing information; a set of symbol buffers configured to receive the data symbols of the output signal; a scheduler configured to populate the set of symbol buffers with the data symbols in a pattern consistent with the embedded timing information; and timing control circuitry configured to support a display device for displaying the output signal, wherein the timing control circuitry is arranged to forward the data symbols from the symbol buffers at a specified time associated with characteristics of the display device. ### Claim 2 (depends on 1) The integrated circuit of claim 1, wherein the timing extraction circuitry uses timing information encoded into a main stream attribute identifier of the output signal to identify the blanking pattern for an output signal. ### Claim 3 (depends on 2) The integrated circuit of claim 2, wherein the scheduler uses the timing information encoded into the main stream attribute identifier to identify horizontal line ends and frame ends for the output signal and wherein the scheduler populates the set of symbol buffers with the data symbols arranged in a series of lines associated with a video frame. ### Claim 4 (depends on 3) The integrated circuit of claim 3, wherein each symbol buffer is associated with a transmitter unit configured to forward symbols from the symbol buffer to a display device. ### Claim 5 (depends on 3) The integrated circuit of claim 3, wherein each symbol buffer is associated with a transmitter unit of a set of transmitter units configured to forward symbols from the symbol buffer to a display device in a line by line fashion wherein each line comprises the symbols comprising a horizontal line of a frame. ### Claim 6 (depends on 5) The integrated circuit of claim 5, wherein the timing control circuitry instructs the transmitter units to send a line of data from the buffer to column drivers of the display in accord with a schedule of the timing circuitry. ### Claim 7 (depends on 6) The integrated circuit of claim 6, wherein the timing control circuitry schedule is associated with display characteristics of the display device. ### Claim 8 (depends on 6) The integrated circuit page of claim 6, wherein each transmitter unit is arranged to establish a point to point connection with an associated column driver of the display device. ### Claim 9 (depends on 8) The integrated circuit of claim 8, wherein each symbol buffer is arranged to receive a low-voltage differential signal (LVDS) data stream from the scheduler using a pair of conductive lines per buffer. ### Claim 10 (depends on 9) The integrated circuit of claim 9, wherein each symbol buffer is arranged to connect with an associated column driver of a display using a pair of conductive lines. ### Claim 11 (depends on 6) The integrated circuit of claim 6, wherein each transmitter unit of the set of transmitter units is arranged to establish a point to point connection with an associated column driver of the display device using a plurality of parallel connections such that each transmitter delivers a portion of the video signal to an associated one of a plurality of column drivers of the display. ### Claim 12 (depends on 11) The integrated circuit of claim 11, wherein the integrated circuit is integrated into a display device. ### Claim 13 (depends on 11) The integrated circuit of claim 11, wherein the integrated circuit is integrated into a display device and further includes the plurality of parallel connections and the plurality of column drivers of the display. ### Claim 14 (depends on 5) The integrated circuit of claim 5, wherein the integrated circuit is configured to output the symbols to a plurality of column drivers of the display. ### Claim 15 A method of processing video data in an audio-video system, the method comprising: receiving an audio-video data stream including video signal and embedded timing information associated with the audio-video data of the data stream; converting the audio-video data stream input into an output signal; identifying a timing pattern for the output signal using the embedded timing information; populating a set of symbol buffers with data symbols in a pattern consistent with the embedded timing information; and forwarding the data symbols from the symbol buffers to a display device. ### Claim 16 (depends on 15) The method of claim 15, wherein identifying a timing pattern for the output signal using the embedded timing information comprises identifying a blanking pattern for the video signal using blanking start and blanking stop indicators. ### Claim 17 (depends on 16) The method of claim 16, wherein identifying a blanking pattern for the video signal using the embedded timing information comprises identifying a main stream attribute identifier in the video signal and extracting timing information encoded into the main stream attribute identifier to identify the blanking pattern for the video signal. ### Claim 18 (depends on 17) The method of claim 17, wherein populating the set of symbol buffers comprises populating the buffers in line by line fashion, wherein each line comprises a horizontal line of an audio video frame and wherein each buffer contains a portion of the line. ### Claim 19 (depends on 18) The method of claim 18, wherein forwarding the data symbols from the symbol buffers to a display device is conducted such that each buffer forwards the portion of the line to an associated column driver of the display device in a plurality of parallel point to point connections between each buffer and the associated column driver. ### Claim 20 A computer implementable method for transmitting audio video data, the method embodied on a tangible, non-transitory, computer readable medium and comprising non-transitory computer readable instructions for: receiving an audio-video data stream having including video signal and embedded timing information associated with the audio-video data of the data stream; converting the audio-video data stream input into an output signal; identifying a timing pattern for the output signal using the embedded timing information; populating a set of symbol buffers with data symbols in a pattern consistent with the embedded timing information; and forwarding the data symbols from the symbol buffers to a display device. ### Claim 21 (depends on 20) The computer implementable method of claim 20, wherein the instructions for identifying a timing pattern for the output signal using the embedded timing information comprises identifying a blanking pattern for the video signal using blanking start and blanking stop indicators. ### Claim 22 (depends on 21) The computer implementable method of claim 21, wherein the instructions for identifying a blanking pattern for the video signal using the embedded timing information further comprise identifying a main stream attribute identifier in the video signal and extracting timing information encoded into the main stream attribute identifier to identify the blanking pattern for the video signal. ### Claim 23 (depends on 22) The computer implementable method of claim 22, wherein the instructions for populating the set of symbol buffers comprise populating the buffers in line by line fashion wherein each line comprises a horizontal line of an audio video frame and wherein each buffer contains a portion of the line. ### Claim 24 (depends on 23) The computer implementable method of claim 23, wherein the instructions for forwarding the data symbols from the symbol buffers to a display device are conducted such that each buffer forwards the portion of the line to an associated column driver of the display device in a plurality of parallel point to point connections between each buffer and the associated column driver. ### Claim 25 (depends on 20) The computer implementable method of claim 20, wherein the instructions are implemented on an integrated circuit of display system. ### Claim 26 (depends on 20) The computer implementable method of claim 20, wherein the computer readable instructions are implemented as firmware on an integrated circuit.