# US 8,788,795 B2 · Programming idiom accelerator to examine pre-fetched instruction streams for multiple processors > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 8,788,795 B2 - Document ID: US8788795B2 - Status: Granted - Kind: B2 - Application number: 12/024,364 - Filed: 2008-02-01 - Published: 2011-07-14 - Granted: 2014-07-22 - Earliest claimed: 2008-02-01 - Assignees: International Business Machines Corporation - Applicants: Ravi K. Arimilli; Satya P. Sharma; Randal C. Swanberg - Inventors: Ravi K. Arimilli; Satya P. Sharma; Randal C. Swanberg - Web page: https://patentgrep.com/patent/US8788795B2 ## CPC - G06F 9/3851: {from multiple instruction streams, e.g. multistreaming} - G06F 9/3802: {Instruction prefetching} - G06F 9/3806: {using address prediction, e.g. return stack, branch history buffer} - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) ## Abstract A wake-and-go mechanism may be a programming idiom accelerator. As a processor fetches instructions, the programming idiom accelerator may look ahead to determine whether a programming idiom is coming up in the instruction stream. If the programming idiom accelerator recognizes a programming idiom, the programming idiom accelerator may perform an action to accelerate execution of the programming idiom. In the case of a wake-and-go programming idiom, the programming idiom accelerator may record an entry in a wake-and-go array, for example. ## Claims ### Claim 1 A method, in a multiple processor data processing system, for performing programming idiom acceleration, the method comprising: performing, by a programming idiom accelerator, a look-ahead operation to examine instruction streams being pre-fetched from memory via a bus for threads running on processors in the multiple processor data processing system, wherein the programming idiom accelerator is external to the processors, and wherein the programming idiom accelerator is associated with the bus; detecting, by the programming idiom accelerator, a predetermined programming idiom comprising a sequence of instructions from a set of known programming idioms within a given instruction stream for a given thread running on a given processor within the processors; and performing, by the programming idiom accelerator; an action to accelerate execution of the sequence of instructions by the given processor. ### Claim 2 (depends on 1) The method of claim 1, wherein performing a look-ahead operation comprises: examining the given instruction stream to identify at least one predetermined sequence of a plurality of instructions that performs a function. ### Claim 3 (depends on 2) The method of claim 2, wherein examining the given instruction stream comprises examining instructions being pre-fetched for the given thread prior to execution of the instructions by the given processor. ### Claim 4 (depends on 1) The method of claim 1, wherein the predetermined programming idiom is a wake-and-go programming idiom. ### Claim 5 (depends on 4) The method of claim 4; wherein the action comprises populating a wake-and-go storage array with a target address. ### Claim 6 (depends on 4) The method of claim 4, wherein the wake-and-go programming idiom comprises a read operation, a comparison operation, and a branch operation. ### Claim 7 (depends on 1) The method of claim 1, wherein the predetermined programming idiom is a lock spinning idiom. ### Claim 8 A data processing syStem, comprising: a bus; a memory; a plurality of processors, wherein each processor runs a thread executing an instruction stream of the thread; and a programming idiom accelerator external to the plurality of processors and associated with the bus, wherein the programming idiom accelerator is configured to: perform a look-ahead operation to examine instruction streams being pre-fetched from the memory via the bus for the threads running on the plurality of processors, wherein each instruction stream comprises instructions to be execute by the corresponding processor; detect a predetermined programming idiom comprising a sequence of instructions from a set of known programming idioms within a given instruction stream for a given thread running on a given processor within the processors; and perform an action to accelerate execution of the sequence of instructions by the given processor. ### Claim 9 (depends on 8) The data processing system of claim 8, wherein performing a look-ahead operation comprises: examining the given instruction stream to identify at least one predetermined sequence of a plurality of instructions that performs a function. ### Claim 10 (depends on 9) The data processing system Of claim 9, wherein examining the given instruction stream comprises examining instructions being pre-fetched for the given thread prior to execution of the instructions by the given processor. ### Claim 11 (depends on 8) The data processing system of claim 8, wherein the predetermined programming idiom is a wake-and-go programming-idiom. ### Claim 12 (depends on 11) The data processing system of claim 11, wherein the action comprises populating a wake-and-go storage array with a target address. ### Claim 13 (depends on 11) The data processing system of claim 11, wherein the wake-and-go programming idiom comprises a read operation, a comparison operation, and a branch operation. ### Claim 14 (depends on 8) The data processing system of claim 8, t herein the predetermined programming idiom is a lock spinning idiom. ### Claim 15 A computer program product comprising a non-transitory computer storage medium having a computer readable program stored thereon, wherein the computer readable program, when executed on a programming idiom accelerator, causes the programming idiom accelerator to: perform a look-ahead operation to examine instruction streams being pre-fetched from memory via a bus for threads running on processors in a multiple processor data processing system, wherein the programming idiom accelerator is external to the processors, and wherein the programming idiom accelerator is associated with the bus; detect a predetermined programming idiom comprising a sequence of instructions from a set of known programming idioms within a given instruction stream for a given thread running on a given processor within the processors; and perform an action to accelerate execution of the sequence of instructions by the given processor. ### Claim 16 (depends on 15) The computer program product of claim 15, wherein performing a look-ahead operation comprises: examining the given instruction stream to identify at least one predetermined sequence of a plurality of instructions that performs a function. ### Claim 17 (depends on 16) The computer program product of claim 16, wherein examining the given instruction stream comprises examining instructions being pre-fetched for the given thread prior to execution of the instructions by the given processor. ### Claim 18 (depends on 15) The computer program product of claim 15, wherein the predetermined programming idiom is a wake-and-go programming idiom. ### Claim 19 (depends on 18) The computer program product of claim 18, wherein the action comprises populating a wake-and-go storage array with a target address. ### Claim 20 (depends on 18) The computer program product of claim 18, wherein the wake-and-go programming idiom comprises a read operation, a comparison operation, and a branch operation.