# US 8,788,743 B2 · Mapping between program states and data patterns

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- Number: US 8,788,743 B2
- Document ID: US8788743B2
- Status: Granted
- Kind: B2
- Application number: 13/444,314
- Filed: 2012-04-11
- Published: 2013-10-17
- Granted: 2014-07-22
- Earliest claimed: 2012-04-11
- Assignees: Micron Technology, Inc.
- Applicants: Sivagnanam Parthasarathy; Patrick R. Khayat; Mustafa N. Kaynak; Zhenlei Shen
- Inventors: Sivagnanam Parthasarathy; Patrick R. Khayat; Mustafa N. Kaynak; Zhenlei Shen
- Web page: https://patentgrep.com/patent/US8788743B2

## CPC

- G11C 16/107: {Programming all cells in an array, sector or block to the same state prior to flash erasing}
- G06F 12/0246: {in block erasable memory, e.g. flash memory}
- G06F 12/06: Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication (G06F12/08 takes precedence)
- G11C 7/1006: {Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor}
- G11C 11/5628: {Programming or writing circuits; Data input circuits}
- G11C 11/5642: {Sensing or reading circuits; Data output circuits}
- G11C 14/0018: {whereby the nonvolatile element is an EEPROM element, e.g. a floating gate or metal-nitride-oxide-silicon [MNOS] transistor}
- G11C 14/0045: {and the nonvolatile element is a resistive RAM element, i.e. programmable resistors, e.g. formed of phase change or chalcogenide material}
- G11C 16/00: Erasable programmable read-only memories (G11C14/00 takes precedence)
- H03M 7/14: Conversion to or from non-weighted codes
- G06F 2206/1014: One time programmable [OTP] memory, e.g. PROM, WORM
- G06F 2212/7201: Logical to physical mapping or translation of blocks or pages
- G11C 13/0002: {using resistive RAM [RRAM] elements}
- G11C 16/0483: {comprising cells having several storage transistors connected in series}
- G11C 16/10: Programming or data input circuits
- G11C 2211/5641: Multilevel memory having cells with different number of storage levels
- G11C: STATIC STORES (semiconductor memory devices H10B)
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- H03M: CODING; DECODING; CODE CONVERSION IN GENERAL (using fluidic means F15C4/00; optical analogue/digital converters G02F7/00; coding, decoding or code conversion, specially adapted for particular applications, see the relevant subclasses, e.g. G01D, G01R, G06F, G06T, G09G, G10L, G11B, G11C, H04B, H04L, H04M, H04N; ciphering or deciphering for cryptography or other purposes involving the need for secrecy G09C)

## Abstract

The present disclosure includes methods and apparatuses for mapping between program states and data patterns. One method includes: programming a group of G memory cells such that a combination of respective program states of the group maps to a constellation point corresponding to a received N unit data pattern, the group used to store N/G units of data per memory cell; wherein the constellation point is one of a number of constellation points of a constellation associated with mapping respective program state combinations of the group of memory cells to N unit data patterns; and wherein the constellation comprises a first mapping shell and a second mapping shell, the constellation points corresponding to the respective first and second mapping shells determined, at least partially, based on a polynomial expression of order equal to G.

## Claims

### Claim 1

A method for operating a memory, comprising:
programming a group of G memory cells such that a combination of respective program states of the group maps to a constellation point corresponding to a received N unit data pattern, the group used to store N/G units of data per memory cell;
wherein the constellation point is one of a number of constellation points of a constellation associated with mapping respective program state combinations of the group of memory cells to N unit data patterns; and
wherein the constellation comprises a first mapping shell and a second mapping shell, the constellation points corresponding to the respective first and second mapping shells determined, at least partially, based on a polynomial expression of order equal to G.

### Claim 2 (depends on 1)

The method of claim 1, wherein the first mapping shell comprises constellation points corresponding only to program state combinations that do not include at least one of L program states to which the group of memory cells are programmable, L being a minimum number of program states needed to store N/G units of data per memory cell of the group.

### Claim 3 (depends on 2)

The method of claim 2, wherein the at least one of the L program states corresponds to a program state having an uppermost threshold voltage (Vt) associated therewith.

### Claim 4 (depends on 2)

The method of claim 2, wherein the second mapping shell comprises a number of constellation points corresponding to program state combinations that include the at least one of the L program states.

### Claim 5 (depends on 2)

The method of claim 2, wherein N/G is a fractional number.

### Claim 6 (depends on 1)

The method of claim 1, wherein the polynomial expression is (A+B)G with AG being a quantity of constellation points of the first mapping shell and G×A(G-1)×B being a quantity of constellation points of the second mapping shell.

### Claim 7 (depends on 6)

The method of claim 6, wherein A is a quantity of program states from which the respective program state combinations corresponding to the first mapping shell are determined and B is a quantity of additional program states from which the respective program state combinations corresponding to the second mapping shell are determined.

### Claim 8 (depends on 6)

The method of claim 6, wherein:
the received N unit data pattern is a N bit data pattern;
N/G is a fractional number of bits per memory cell;
those N bit data patterns corresponding to binary values less than the binary value of AG are mapped to program state combinations corresponding to the first mapping shell; and
those N bit data patterns corresponding to binary values greater than or equal to the binary value of AG are mapped to program state combinations corresponding to the second mapping shell.

### Claim 9 (depends on 1)

The method of claim 1, including determining whether the constellation point corresponding to the received N unit data pattern is within the first mapping shell or the second shell mapping shell based on a value of a most significant bit (MSB) of the data pattern

### Claim 10

A method for operating a memory, comprising:
receiving an N unit data pattern to be stored in a group of G memory cells, wherein the N unit data pattern is one of a number of N unit data patterns to which combinations of program states of the G memory cells are mapped; and
programming each memory cell of the group to a respective one of L program states such that a combination of the program states of the group maps to the received N unit data pattern, wherein L is a number of program states used to store N/G units of data per memory cell;
wherein the respective program states to which the memory cells of the group are programmed such that the combination of the program states of the group maps to the received N unit data pattern are determined using a mapping based, at least partially, on a polynomial expression of order equal to G, a first term of the polynomial expression corresponding to a first mapping shell and a second term of the polynomial expression corresponding to a second mapping shell.

### Claim 11 (depends on 10)

The method of claim 10, wherein:
the first term of the polynomial expression is AG, with AG being a quantity of constellation points of the first mapping shell, and wherein A is a quantity of the L program states corresponding to the AG constellation points of the first mapping shell; and
the second term of the polynomial expression is G×A(G-1)×B, with G×A(G-1)×B being a quantity of constellation points of the second mapping shell, and wherein B is an additional quantity of the L program states corresponding to the G×A(G-1)×B constellation points of the second mapping shell.

### Claim 12 (depends on 11)

The method of claim 11, wherein each of the AG constellation points of the first mapping shell corresponds to a different N unit data pattern of the number of N bit data patterns.

### Claim 13 (depends on 12)

The method of claim 12, wherein none of the constellation points of the first mapping shell correspond to a program state combination comprising at least one of the L program states.

### Claim 14 (depends on 13)

The method of claim 13, wherein:
the AG constellation points of the first mapping shell correspond to data patterns of the number of N unit data patterns having a binary value of less than the binary value of AG; and
the G×A(G-1)×B constellation points of the second mapping shell correspond to data patterns of the number of N unit data patterns having a binary value greater than or equal to the binary value of AG.

### Claim 15 (depends on 14)

The method of claim 14, wherein, if the received N unit data pattern has a binary value greater than or equal to the binary value of AG, then one or more units of the received N unit data pattern determine which of the memory cells of the group is programmed to at least one of the B L program states.

### Claim 16 (depends on 11)

The method of claim 11, wherein A is equal to 2a with “a” being a value such that 2a is an uppermost power of 2 value that is less than L.

### Claim 17

A method for operating a memory, comprising:
determining a program state of each memory cell of a group of G memory cells each programmed to one of L program states, wherein a combination of the respective determined program states of the group maps to one N unit data pattern of a number of N unit data patterns; and
determining the one N unit data pattern of the number of N unit data patterns to which the combination of the respective determined program states corresponds based, at least partially, on a mapping constellation comprising a first mapping shell and a second mapping shell, the first and second mapping shells being defined by a polynomial expression of order G.

### Claim 18 (depends on 17)

The method of claim 17, wherein each memory cell of the group is a fractional bit memory cell, and wherein the polynomial expression is (A+B)G with a first term of the polynomial expression being AG, with AG being a quantity of constellation points of the first mapping shell, and a second term of the polynomial expression being G×A(G-1)×B, with G×A(G-1)×B being a quantity of constellation points of the second mapping shell.

### Claim 19

An apparatus, comprising:
a data packing component coupled to an array of memory cells and configured to:
map 2N data patterns to 2N program state combinations of a group of G memory cells each programmable to one of L program states and used to store N/G units of data per memory cell; and
wherein mappings between the data patterns and program state combinations include at least a first shell of constellation mapping points corresponding to program state combinations comprising only a first quantity (A) of the L program states and a second shell of constellation mapping points corresponding only to program state combinations comprising at least one of the L program states other than the A program states.

### Claim 20 (depends on 19)

The apparatus of claim 19, wherein:
the quantity of constellation mapping points of the first shell is determined based on a first term of a polynomial expression (A+B)G such that AG is the quantity of constellation mapping points of the first shell; and
the quantity of constellation mapping points of the second shell is determined based on a second term of the polynomial expression such that G×A(G-1)×B is the quantity of constellation points of the second mapping shell, with B being a quantity of program states equal to L-A.

### Claim 21 (depends on 19)

The apparatus of claim 19, wherein the 2N data patterns are encoded data patterns.

### Claim 22 (depends on 19)

The apparatus of claim 19, wherein the apparatus is a controller.

### Claim 23 (depends on 19)

The apparatus of claim 19, wherein the memory cells are fractional unit memory cells.

### Claim 24 (depends on 19)

The apparatus of claim 19, wherein the constellation mapping points are associated with a square constellation of L2 points.

### Claim 25 (depends on 19)

The apparatus of claim 19, wherein half of the 2N mappings between the program state combination and the data patterns correspond to the first shell.

### Claim 26 (depends on 25)

The apparatus of claim 25, wherein half of the 2N mappings between the program state combination and the data patterns correspond to the second shell.

### Claim 27

An apparatus, comprising:
an array of memory cells each memory cell programmable to a respective one of L program states; and
a controller coupled to the array and configured to control a method executed to:
receive data to be stored in a group of G memory cells as an N unit data pattern, wherein the N unit data pattern is one of a number of N unit data patterns to which program state combinations of the G memory cells are mapped; and
program each memory cell of the group to a respective one of the L program states such that a combination of the program states of the group maps to the received N unit data pattern;
wherein the respective program states to which the memory cells of the group are programmed such that the combination of the program states of the group maps to the received N unit data pattern is determined using a mapping based, at least partially, on a polynomial expression of order equal to G, a first term of the polynomial expression corresponding to a first mapping shell and a second term of the polynomial expression corresponding to a second mapping shell.

### Claim 28 (depends on 27)

The apparatus of claim 27, wherein the controller comprises an encoder/decoder component configured to encode the received data with error correction data to form the N unit data pattern.

### Claim 29 (depends on 27)

The apparatus of claim 27, wherein:
the first term of the polynomial expression is AG, with AG being a quantity of constellation points of the first mapping shell, and wherein A is a quantity of the L program states corresponding to the AG constellation points of the first mapping shell; and
the second term of the polynomial expression is G×A(G-1)×B, with G×A(G-1)×B being a quantity of constellation points of the second mapping shell, and wherein B is an additional quantity of the L program states corresponding to the G×A(G-1)×B constellation points of the second mapping shell.

### Claim 30 (depends on 27)

The apparatus of claim 27, wherein the mapping indicates a swap cell for constellation points of the second mapping shell.

### Claim 31 (depends on 27)

The apparatus of claim 27, wherein the N unit data patterns are N bit data patterns, and wherein each of the mappings of the first mapping shell correspond to an N bit data pattern having a most significant bit with a binary value of “0,” and each of the mappings of the second mapping shell correspond to an N bit data pattern having a most significant bit with a binary value of “1.”

### Claim 32 (depends on 27)

The apparatus of claim 27, wherein mappings corresponding to the first mapping shell are systematic and mappings corresponding to the second mapping shell are near systematic.

### Claim 33 (depends on 27)

The apparatus of claim 27, wherein the controller is configured to control execution of the method without performing a code expansion on the received data.