# US 8,788,540 B2 · System level applications of adaptive computing (SLAAC) technology

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- Number: US 8,788,540 B2
- Document ID: US8788540B2
- Status: Granted
- Kind: B2
- Application number: 12/177,831
- Filed: 2008-07-22
- Published: 2009-01-08
- Granted: 2014-07-22
- Earliest claimed: 2001-01-03
- Assignees: University of Southern California
- Applicants: Brian Schott; Robert Parker
- Inventors: Brian Schott; Robert Parker
- Web page: https://patentgrep.com/patent/US8788540B2

## CPC

- G06F 9/54: Interprogram communication
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)

## Abstract

An API (Application Programming Interface) for an adaptive computing system (ACS) may be used to create a system for performing an application on different types of ACS platforms. The API may be used to generate a system object including a host and a number of nodes and channels. A system data structure is created which describes the nodes, which may be FPGA (Field Programmable Gate Array)-based ACS accelerator boards. The API may enable source-code porting and scaling from small research platforms to larger field-deployable platforms.

## Claims

### Claim 1

A method comprising:
maintaining, in a world object, information about adaptive computing devices;
defining an adaptive computing system data structure describing a ring system object including a ring of nodes, each of said nodes comprising at least one of the adaptive computing devices;
generating, by a host process, the ring system object defined in the adaptive computing system data structure, where the ring system object includes the ring of nodes and communication channels between the nodes and is generated based on the information maintained in the world object;
defining a configuration data structure for the ring system object;
sending a bitstream to at least one of the nodes as specified in the configuration data structure;
monitoring clock and toggle rates corresponding to at least a portion of the nodes; and
based on the monitored clock and toggle rates, modifying a power level of at least one of the nodes.

### Claim 2 (depends on 1)

The method of claim 1, wherein each of said nodes comprises an FPGA (Field Programmable Gate Array)-based adaptive computing device.

### Claim 3 (depends on 1)

The method of claim 1, further comprising interconnecting first-in first out (FIFO) registers associated with said adaptive computing devices to create channels between said devices.

### Claim 4 (depends on 1)

The method of claim 1, further comprising destroying the ring system object.

### Claim 5 (depends on 1)

The method of claim 1, wherein at least a portion of the nodes are stopped when a power demand placed on at least a portion of the nodes by the host process exceeds a threshold level.

### Claim 6 (depends on 1)

The method of claim 1, wherein the adaptive computing devices are managed by multi-threaded control processes configured to execute commands, monitor the adaptive computing devices, and communicate with control processes for other adaptive computing devices.

### Claim 7 (depends on 1)

The method of claim 1, wherein said configuration data structure includes information identifying nodes to configure.

### Claim 8 (depends on 1)

The method of claim 1, wherein said configuration data structure includes device-level configuration information for configuring an adaptive computing device.

### Claim 9 (depends on 1)

The method of claim 1, wherein said generating a ring system object comprises executing instructions defining said ring system object on a first platform.

### Claim 10 (depends on 9)

The method of claim 9, further comprising:
executing said instructions defining said ring system object on a second platform; and
generating said ring system object on the second platform in response to said executing the instructions.

### Claim 11 (depends on 10)

The method of claim 10, wherein the first platform comprises a cluster of workstations, each workstation including a processor connected to an adaptive computing device.

### Claim 12 (depends on 11)

The method of claim 11, wherein the adaptive computing devices are connected to a PCI (Peripheral Component Interconnect) bus.

### Claim 13 (depends on 11)

The method of claim 11, wherein the second platform comprises an embedded system including a host processor connected to a plurality of adaptive computing devices.

### Claim 14 (depends on 13)

The method of claim 13, wherein the plurality of adaptive computing devices are connected to a VME (Versa Module Europa) bus.

### Claim 15

An article comprising a non-transitory machine-readable medium including machine-executable instructions, the instructions operative to cause a machine to:
maintain, in a world object, information about adaptive computing devices;
define an adaptive computing system data structure describing a ring system object including a ring of nodes, each of said nodes comprising at least one of the adaptive computing devices;
generate, by a host process, the ring system object defined in the adaptive computing system data structure, where the ring system object includes the ring of nodes and communication channels between the nodes and is generated based on the information maintained in the world object;
define a configuration data structure for the ring system object;
send a bitstream to at least one of the nodes as specified in the configuration data structure;
monitor clock and toggle rates corresponding to at least a portion of the nodes; and
based on the monitored clock and toggle rates, modify a power level of at least one of the nodes.

### Claim 16 (depends on 15)

The article of claim 15, wherein each of said nodes comprises an FPGA (Field Programmable Gate Array)-based adaptive computing device.

### Claim 17 (depends on 15)

The article of claim 15, further comprising instructions operative to cause the machine to interconnect first-in first out (FIFO) registers associated with said adaptive computing devices to create channels between said devices.

### Claim 18 (depends on 15)

The article of claim 15, further comprising instructions operative to cause the machine to destroy the ring system object.

### Claim 19 (depends on 15)

The article of claim 15, further comprising instructions operative to cause the machine to stop at least a portion of the nodes when a power demand placed on at least a portion of the nodes by the host process exceeds a threshold level.

### Claim 20 (depends on 15)

The article of claim 15,
wherein the adaptive computing devices are managed by multi-threaded control processes configured to execute commands, monitor the adaptive computing devices, and communicate with control processes for other adaptive computing devices.

### Claim 21 (depends on 15)

The article of claim 15, wherein said configuration data structure includes information identifying nodes to configure.

### Claim 22 (depends on 15)

The article of claim 15, wherein said configuration data structure includes device-level configuration information for configuring an adaptive computing device.

### Claim 23 (depends on 15)

The article of claim 15, wherein the instructions for generating a ring system object comprise instructions operative to cause a machine on a first platform to define said ring system object and to cause a machine on a second platform to define said ring system object.

### Claim 24 (depends on 23)

The article of claim 23, wherein the first platform comprises a cluster of workstations, each workstation including a processor connected to an adaptive computing device.

### Claim 25 (depends on 24)

The article of claim 24, wherein the adaptive computing devices are connected to a PCI (Peripheral Component Interconnect) bus.

### Claim 26 (depends on 25)

The article of claim 25, wherein the second platform comprises an embedded system including a host processor connected to a plurality of adaptive computing devices.

### Claim 27 (depends on 26)

The article of claim 26, wherein the plurality of adaptive computing devices are connected to a VME (Versa Module Europa) bus.