# US 8,787,597 B2 · Pop-up noise suppression in audio

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- Number: US 8,787,597 B2
- Document ID: US8787597B2
- Status: Granted
- Kind: B2
- Application number: 12/713,078
- Filed: 2010-02-25
- Published: 2010-09-02
- Granted: 2014-07-22
- Earliest claimed: 2009-02-27
- Assignees: ST-Ericsson India Pvt. Ltd.; ST-Ericsson SA
- Applicants: Sanjeev Ranganathan; Shyam Somayajula; Srinath Sridharan; Lionel Cimaz
- Inventors: Sanjeev Ranganathan; Shyam Somayajula; Srinath Sridharan; Lionel Cimaz
- Web page: https://patentgrep.com/patent/US8787597B2

## CPC

- H04R 3/002: {Damping circuit arrangements for transducers, e.g. motional feedback circuits}
- G10K 11/002: {Devices for damping, suppressing, obstructing or conducting sound in acoustic devices (G10K1/06 - G10K1/10 take precedence; for electro-mechanical transducers for communication H04R3/002)}
- H04R 3/00: Circuits for transducers (arrangements for producing a reverberation or echo sound G10K15/08; amplifiers H03F)
- H04R 3/007: {Protection circuits for transducers}
- H04R: LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; ELECTRIC HEARING AIDS; PUBLIC ADDRESS SYSTEMS (producing sounds with frequency not determined by supply frequency G10K)
- G10K: SOUND-PRODUCING DEVICES; METHODS OR DEVICES FOR PROTECTING AGAINST, OR FOR DAMPING, NOISE OR OTHER ACOUSTIC WAVES IN GENERAL; ACOUSTICS NOT OTHERWISE PROVIDED FOR

## Abstract

Systems and methods for suppressing pop-up noise in an audio signal are disclosed. The system includes a driver circuit shared by a pin interface and a complementary pin interface. A control unit is coupled to the pin interface and the complementary pin interface. To activate the pin interface, the control unit is configured to first activate the driver output at the complementary pin interface. Once the complementary pin interface achieves a preset voltage, the driver output is switched to the pin interface by the control unit. In addition, the driver circuit can be calibrated for a DC offset on the complementary pin interface by re-using calibration data calculated at the pin interface. Further, DC correction signals can be provided from a pre-biasing circuit based on the calibration data of the driver circuit.

## Claims

### Claim 1

A system comprising:
first and second pin interfaces;
a first audio signal driver circuit having its output coupled to the first pin interface, wherein the first audio signal driver circuit is configured to be fed at its input with a first audio input signal;
a second audio signal driver circuit having its output coupled to the second pin interface, wherein the second audio signal driver circuit is configured to be fed at its input with a second audio input signal; and
a pre-biasing circuit coupled to the input of the first audio signal driver circuit and to the input of the second audio signal driver circuit, wherein the pre-biasing circuit is configured to:
provide an offset correction signal to the first audio signal driver circuit during power up of the first audio signal driver circuit when the DC offset at the first pin interface is different from the DC offset at the second pin interface;
ramp the offset correction signal to create a ramped correction signal; and
provide the ramped correction signal to the second audio signal driver circuit during power up of the second audio signal driver circuit while providing the offset correction signal to the first audio driver circuit.

### Claim 2 (depends on 1)

The system as claimed in claim 1, wherein the second audio input signal and the first audio input signal share a signal pathway.

### Claim 3 (depends on 1)

The system as claimed in claim 1, wherein the pre-biasing circuit is configured to determine values of the offset correction signal and the ramped correction signal from calibration data of the first audio signal driver circuit and the second audio signal driver circuit respectively.

### Claim 4 (depends on 3)

The system as claimed in claim 3, further comprising a third pin interface configured to share the first audio signal driver circuit with the first pin interface, wherein the pre-biasing circuit is configured to determine a value of the offset correction signal from a calibration of the first audio signal driver circuit at the third pin interface.

### Claim 5 (depends on 3)

The system as claimed in claim 3, further comprising a third pin interface configured to share the second audio signal driver circuit with the second pin interface, wherein the pre-biasing circuit is configured to determine a value of the ramped correction signal from a calibration of the second audio signal driver circuit at the third pin interface.

### Claim 6 (depends on 1)

The system as claimed in claim 1, further comprising: a third pin interface; a first speaker coupled between the first pin interface and the third pin interface and configured to be driven by the first audio signal driver circuit.

### Claim 7 (depends on 6)

The system as claimed in claim 6, further comprising: a second speaker coupled between the second pin interface and the third pin interface and configured to be driven by the second audio signal driver circuit.
