# US 8,786,533 B2 · Pulse output circuit, shift register and display device

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- Number: US 8,786,533 B2
- Document ID: US8786533B2
- Status: Granted
- Kind: B2
- Application number: 13/604,709
- Filed: 2012-09-06
- Published: 2013-03-07
- Granted: 2014-07-22
- Earliest claimed: 2001-05-11
- Assignees: Semiconductor Energy Laboratory Co., Ltd.
- Applicants: Munehiro Azami; Shou Nagao; Yoshifumi Tanada
- Inventors: Munehiro Azami; Shou Nagao; Yoshifumi Tanada
- Web page: https://patentgrep.com/patent/US8786533B2

## CPC

- G11C 19/28: using semiconductor elements (G11C19/14, G11C19/36 take precedence)
- G02F 1/13306: {Circuit arrangements or driving methods for the control of single liquid crystal cells (G02F1/132, G02F1/133382 take precedence)}
- G02F 1/1333: Constructional arrangements; {Manufacturing methods}(G02F1/135, G02F1/136 take precedence)
- G09G 3/36: using liquid crystals
- G09G 3/3688: {suitable for active matrices only}
- H10D 86/40: characterised by multiple TFTs
- H10D 86/441: {Interconnections, e.g. scanning lines}
- H10D 86/60: wherein the TFTs are in active matrices
- G09G 2310/0286: Details of a shift registers arranged for use in a driving circuit
- G09G 2330/021: Power management, e.g. power saving
- G11C: STATIC STORES (semiconductor memory devices H10B)
- G02F: OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G09G: ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION (arrangements for transferring data between digital computers and displays G06F3/14; static indicating arrangements comprising an association of a number of separate sources or light control cells G09F9/00; static indicating arrangements comprising integral associations of a number of light sources H01J, H01K, H10H, H05B33/12; scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission, details thereof H04N1/00)
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A pulse is input to first and second TFTs to turn ON the first and second TFTs so that the potential of a node a rises. When the potential of the node a reaches (VDD−VthN), the node α enters a floating state. Accordingly, a third TFT then turns ON, and potential of an output node rises as a clock signal reaches the level H. On the other hand, potential of a gate electrode of the third TFT further rises due to an operation of capacitance as the potential of the output node rises, so that the potential of the output node would be higher than (VDD+VthN). Thus, the potential of the output node rises to VDD without voltage drop caused by a threshold of the third TFT.

## Claims

### Claim 1

A display device comprising:
a substrate;
a driver circuit over the substrate; and
a pixel over the substrate, and electrically connected to the driver circuit,
wherein the driver circuit comprises a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor and a sixth transistor,
wherein the pixel comprises a seventh transistor and a display element,
wherein the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor and the seventh transistor have a same conductivity type,
wherein a gate of the first transistor is electrically connected to a first input terminal,
wherein a gate of the second transistor is electrically connected to a second input terminal,
wherein a gate of the third transistor is electrically connected to the gate of the second transistor,
wherein a gate of the fourth transistor is electrically connected to the gate of the first transistor,
wherein a gate of the fifth transistor is electrically connected to one of source and drain of the first transistor,
wherein the gate of the fifth transistor is electrically connected to one of source and drain of the second transistor,
wherein a gate of the sixth transistor is electrically connected to one of source and drain of the fourth transistor,
wherein the gate of the sixth transistor is electrically connected to one of source and drain of the third transistor,
wherein a first wiring is electrically connected to the other of source and drain of the first transistor,
wherein a second wiring is electrically connected to the other of source and drain of the second transistor,
wherein the second wiring is electrically connected to the other of source and drain of the fourth transistor,
wherein a wiring for supplying a clock signal is electrically connected to one of source and drain of the fifth transistor,
wherein an output terminal is electrically connected to the other of source and drain of the fifth transistor,
wherein the output terminal is electrically connected to one of source and drain of the sixth transistor, and
wherein the other of source and drain of the sixth transistor is electrically connected to the second wiring.

### Claim 2 (depends on 1)

The display device according to claim 1, further comprising a capacitor,
wherein a first terminal of the capacitor is electrically connected to the gate of the fifth transistor, and
wherein a second terminal of the capacitor is electrically connected to the other of source and drain of the fifth transistor.

### Claim 3 (depends on 1)

The display device according to claim 1, wherein the display element is a liquid crystal element.

### Claim 4 (depends on 1)

The display device according to claim 1, wherein the substrate comprises glass.

### Claim 5 (depends on 1)

The display device according to claim 1,
wherein the first wiring is configured to supply a first power source voltage, and
wherein the second wiring is configured to supply a second power source voltage.

### Claim 6 (depends on 1)

The display device according to claim 1, wherein the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor and the seventh transistor have an n-type conductivity.

### Claim 7 (depends on 1)

A display module comprising the display device according to claim 1 and an FPC.

### Claim 8 (depends on 1)

An electric apparatus comprising the display device according to claim 1, and at least one of an antenna, an operation switch, a battery, an audio input portion, an audio output portion, an image receiving portion, an external interface, a stylus and a keyboard.

### Claim 9 (depends on 1)

The display device according to claim 1, wherein the display element is a light emitting element.

### Claim 10 (depends on 9)

The display device according to claim 9, wherein the light emitting element comprises an electroluminescence material.

### Claim 11

A semiconductor device comprising:
a substrate; and
a driver circuit over the substrate,
wherein the driver circuit comprises a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor and a sixth transistor,
wherein the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor and the sixth transistor have a same conductivity type,
wherein a gate of the first transistor is electrically connected to a first input terminal,
wherein a gate of the second transistor is electrically connected to a second input terminal,
wherein a gate of the third transistor is electrically connected to the gate of the second transistor,
wherein a gate of the fourth transistor is electrically connected to the gate of the first transistor,
wherein a gate of the fifth transistor is electrically connected to one of source and drain of the first transistor,
wherein the gate of the fifth transistor is electrically connected to one of source and drain of the second transistor,
wherein a gate of the sixth transistor is electrically connected to one of source and drain of the fourth transistor,
wherein the gate of the sixth transistor is electrically connected to one of source and drain of the third transistor,
wherein a first wiring is electrically connected to the other of source and drain of the first transistor,
wherein a second wiring is electrically connected to the other of source and drain of the second transistor,
wherein the second wiring is electrically connected to the other of source and drain of the fourth transistor,
wherein a wiring for supplying a clock signal is electrically connected to one of source and drain of the fifth transistor,
wherein an output terminal is electrically connected to the other of source and drain of the fifth transistor,
wherein the output terminal is electrically connected to one of source and drain of the sixth transistor, and
wherein the other of source and drain of the sixth transistor is electrically connected to the second wiring.

### Claim 12 (depends on 11)

The semiconductor device according to claim 11, further comprising a capacitor,
wherein a first terminal of the capacitor is electrically connected to the gate of the fifth transistor, and
wherein a second terminal of the capacitor is electrically connected to the other of source and drain of the fifth transistor.

### Claim 13 (depends on 11)

The semiconductor device according to claim 11, wherein the substrate comprises glass.

### Claim 14 (depends on 11)

The semiconductor device according to claim 11,
wherein the first wiring is configured to supply a first power source voltage, and
wherein the second wiring is configured to supply a second power source voltage.

### Claim 15 (depends on 11)

The semiconductor device according to claim 11, wherein the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor and the sixth transistor have an n-type conductivity.

### Claim 16 (depends on 11)

A display module comprising the semiconductor device according to claim 11 and an FPC.

### Claim 17 (depends on 11)

An electric apparatus comprising the semiconductor device according to claim 11, and at least one of an antenna, an operation switch, a battery, an audio input portion, an audio output portion, an image receiving portion, an external interface, a stylus and a keyboard.
