# US 8,786,449 B1 · System-on-chip with thermal management core

> Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt

- Number: US 8,786,449 B1
- Document ID: US8786449B1
- Status: Granted
- Kind: B1
- Application number: 12/687,817
- Filed: 2010-01-14
- Granted: 2014-07-22
- Earliest claimed: 2009-12-16
- Assignees: Applied Micro Circuits Corporation
- Applicants: Waseem Saify Kraipak; George Bendak
- Inventors: Waseem Saify Kraipak; George Bendak
- Web page: https://patentgrep.com/patent/US8786449B1

## CPC

- G06F 1/206: {comprising thermal management}
- Y02D 10/00: Energy efficient computing, e.g. low power processors, power management or thermal management
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- Y02D: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE

## Abstract

A system and method are provided for using a thermal management core to control temperature on a system-on-chip (SoC). The method provides an SoC with an internal thermal management core and an internal temperature sensor. For example, the sensor may be located on or near a processor core die. The thermal management core monitors temperatures recorded by the SoC temperature sensor, and sends commands for controlling SoC device functions. In response to these commands, the thermal management core monitors a change in the temperature at SoC temperature sensor. The temperature sensor may be monitored via a dedicated SoC internal interface connecting the processor and the thermal management core. Alternately, the thermal management core may poll for temperatures via a system management bus (SMBUS) SoC external interface connecting the processor and thermal management core. Further, a dedicated SoC external alert interface connecting the processor and thermal management core may be monitored.

## Claims

### Claim 1

A method for using a thermal management core to control temperature on a system-on-chip (SoC), comprising:
monitoring, by a thermal management core, a first temperature measured by a first temperature sensor located on or near a processor of the SoC, and a second temperature measured by a second temperature sensor located on or near a memory device of the SoC; and
sending, by the thermal management core, a first command that instructs a memory device controller of the SoC to change an operating frequency of the memory device based on at least one of the first temperature or the second temperature.

### Claim 2 (depends on 1)

The method of claim 1, wherein monitoring the first temperature and the second temperature comprises at least one of monitoring via a dedicated SoC internal interface connecting the processor and the thermal management core, polling via a system management bus SoC external interface connecting the processor and thermal management core, or monitoring a dedicated SoC external alert interface connecting the processor and thermal management core.

### Claim 3 (depends on 2)

The method of claim 2,
further comprising sending a second command to change an operating frequency of the processor.

### Claim 4 (depends on 3)

The method of claim 3, wherein sending the second command comprises sending the second command via at least one of the dedicated SoC internal interface, or the system management bus.

### Claim 5 (depends on 2)

The method of claim 2,
wherein monitoring the first temperature and the second temperature comprises monitoring at least one board-mounted temperature sensor of the SoC by at least one of polling via the system management bus, or monitoring the dedicated SoC external alert interface.

### Claim 6 (depends on 2)

The method of claim 2,
wherein monitoring the second temperature comprises at least one of polling for the second temperature via the system management bus, or monitoring the dedicated SoC external alert interface; and
wherein sending the first command comprises sending the first command via the system management bus.

### Claim 7 (depends on 1)

The method of claim 1,
further comprising:
in response to a determination that at least one of the first temperature or the second temperature satisfy a criterion, sending a second command, via a system management bus, to a board-mounted fan of a circuit board on which the SoC is mounted.

### Claim 8 (depends on 2)

The method of claim 2, further comprising determining whether at least one of the first temperature or the second temperature satisfy a criterion after the sending the command.

### Claim 9 (depends on 8)

The method of claim 8,
further comprising:
in response to a determination that at least one of the first temperature or the second temperature does not satisfy the criterion, sending a second command, via a system management bus, to a fan mounted on the SoC.

### Claim 10 (depends on 8)

The method of claim 8,
further comprising:
in response to a determination that at least one of the first temperature or the second temperature does not satisfy a criterion in response to the command, sending a third command to at least one of discontinue a processor operation, or to discontinue a memory operation.

### Claim 11

A system-on-chip (SoC) with a thermal management core for controlling temperature, the SoC comprising:
a first temperature sensor located on or near a processor of the SoC;
a second temperature sensor located on or near a memory device of the SoC; and
a thermal management core comprising a sensing interface configured to monitor a first temperature measured by the first temperature sensor and a second temperature measured by the second temperature sensor, and a command interface configured to send a first command that instructs a memory controller of the SoC to alter an operating frequency of the memory device in response to at least one of the first temperature or the second temperature satisfying a criterion.

### Claim 12 (depends on 11)

The SoC of claim 11, wherein the sensing interface comprises at least one of a dedicated SoC internal interface connected to the processor, a system management bus SoC external interface connected to the processor configured to poll the first temperature, or a dedicated SoC external alert interface connected to the processor configured to monitor for an alert.

### Claim 13 (depends on 12)

The SoC of claim 12, wherein the command interface comprises at least one of the dedicated SoC internal interface or the system management bus.

### Claim 14 (depends on 13)

The SoC of claim 13,
wherein the thermal management core command interface is further configured to send a second command to change an operating frequency of the processor in response to at least one of the first temperature or the second temperature satisfying the criterion.

### Claim 15 (depends on 11)

The SoC of claim 11, further comprising:
a board-mounted temperature sensor mounted on a circuit board adjacent to the SoC,
wherein the thermal management core is further configured to monitor the board-mounted temperature sensor by at least one of polling the board-mounted temperature sensor via a system management bus or monitoring a dedicated SoC external alert interface.

### Claim 16 (depends on 11)

The SoC of claim 11,
wherein the thermal management core is further configured to monitor the first temperature sensor and the second temperature sensor by at least one of polling via a system management bus (SMBUS) or monitoring a dedicated SoC external alert interface.

### Claim 17 (depends on 11)

The SoC of claim 11, further comprising:
a fan mounted on a circuit board adjacent to the SoC,
wherein the thermal management core is further configured to, in response to at least one of the first temperature or the second temperature satisfying the criterion, send a second command to the fan via a system management bus connecting the board-mounted fan and thermal management core.

### Claim 18 (depends on 11)

The SoC of claim 11, further comprising:
a fan mounted on the SoC,
wherein the thermal management core is further configured to, in response to at least one of the first temperature or the second temperature satisfying the criterion, send a second command to the fan via a system management bus connecting the fan and the thermal management core.

### Claim 19 (depends on 11)

The SoC of claim 11, wherein the thermal management core is further configured to determine whether at least one of the first temperature or the second temperature are within an allowable range after sending the first command.

### Claim 20 (depends on 19)

The SoC of claim 19, wherein the thermal management core is further configured to, in response to a determination that the at least one of the first temperature or the second temperature does is not within the allowable range after sending the first command, send a subsequent command to at least one of discontinue a processor operation or discontinue a memory operation.