# US 8,786,360 B2 · Circuit and method for fast switching of a current mirror with large MOSFET size

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- Number: US 8,786,360 B2
- Document ID: US8786360B2
- Status: Granted
- Kind: B2
- Application number: 11/679,364
- Filed: 2007-02-27
- Published: 2007-09-13
- Granted: 2014-07-22
- Earliest claimed: 2006-03-07
- Assignees: STMicroelectronics Asia Pacific Pte Ltd
- Applicants: Justin Ang
- Inventors: Justin Ang
- Web page: https://patentgrep.com/patent/US8786360B2

## CPC

- G05F 3/262: {using field-effect transistors only}
- G05F: SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES

## Abstract

The present invention discloses a fast switching current mirror circuit and method for generating fast switching current. The circuit and method for fast switching of a current mirror with large MOSFET size will save space and current consumption.

## Claims

### Claim 1

A circuit for providing a switched current comprising:
a first current mirror having a power terminal coupled to a source of supply voltage, an input, and an output;
a second current mirror having an input for receiving an input current, a first output coupled to the output of the first current mirror, a second output coupled to the input of the first current mirror, and a power terminal coupled to ground;
a draining module having an input coupled to the output of the first current mirror, a first output coupled to the input of the first current mirror, and a second output coupled to ground; and
an MOS output transistor having a gate coupled to the input of the first current mirror through a first switch and coupled to the source of supply voltage through a second switch, a first current terminal coupled to the source of supply voltage, and a second current terminal for providing the switched current.

### Claim 2 (depends on 1)

The circuit of claim 1 wherein the first current mirror comprises a PMOS current mirror.

### Claim 3 (depends on 1)

The circuit of claim 1 wherein the first current mirror comprises a first transistor one-thousandth the size of the output transistor.

### Claim 4 (depends on 3)

The circuit of claim 3 wherein the first current mirror comprises a second transistor one-thousandth the size of the output transistor.

### Claim 5 (depends on 1)

The circuit of claim 1 wherein the second current mirror comprises an NMOS current mirror.

### Claim 6 (depends on 1)

The circuit of claim 1 wherein the draining module comprises:
an inverter having an input coupled to the input of the draining module, and an output; and
a transistor having a gate coupled to the output of the inverter, a first current output coupled to the first output of the draining module, and a second current output coupled to the second output of the draining module.

### Claim 7 (depends on 6)

The circuit of claim 6 wherein the transistor comprises an NMOS transistor.

### Claim 8 (depends on 1)

The circuit of claim 1 wherein the input current is equal to 50 μA.

### Claim 9 (depends on 1)

The circuit of claim 1 wherein the switched current is switched to 50 mA.

### Claim 10 (depends on 1)

The circuit of claim 1 wherein the first current mirror comprises a unity gain current mirror.

### Claim 11 (depends on 1)

The circuit of claim 1 wherein the second current mirror comprises a unity gain current mirror.

### Claim 12

A circuit for providing a switched current comprising:
a first current mirror;
a second current mirror for receiving an input current having first and second outputs coupled to the first current mirror;
an inverter having an input coupled to the first output of the second current mirror, and an output;
a first transistor having a gate coupled to the output of the inverter, a drain coupled to the second output of the second current mirror, and a source coupled to ground; and
a second transistor having a gate coupled to an input of the first current mirror through a first switch and coupled to a source of supply voltage through a second switch, a source coupled to the source of supply voltage, and a drain for providing the switched current, wherein the second transistor comprises an MOS transistor.

### Claim 13

A circuit for providing a switched current comprising:
a first current mirror;
a second current mirror for receiving an input current having first and second outputs coupled to the first current mirror;
an inverter having an input coupled to the first output of the second current mirror, and an output;
a draining transistor having a gate coupled to the output of the inverter, a drain coupled to the second output of the second current mirror, and a source coupled to ground; and
a switched MOS output transistor having a gate coupled to an input of the first current mirror, a source coupled to a source of supply voltage, and a drain for providing the switched current.