# US 8,786,354 B2 · Low-power, high-voltage integrated circuits

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- Number: US 8,786,354 B2
- Document ID: US8786354B2
- Status: Granted
- Kind: B2
- Application number: 13/721,926
- Filed: 2012-12-20
- Published: 2014-01-02
- Granted: 2014-07-22
- Earliest claimed: 2010-08-10
- Assignees: Infineon Technologies AG
- Applicants: Infineon Technologies AG
- Inventors: Mario Motz
- Web page: https://patentgrep.com/patent/US8786354B2

## CPC

- H10W 42/80: protecting against overcurrent or overload, e.g. fuses or shunts (integrated devices comprising arrangements for electrical protection H10D89/60)
- H03K 19/0016: {by using a control or a clock signal, e.g. in order to apply power supply}
- H10D 89/601: {for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs}
- H10D 8/60: Schottky-barrier diodes
- H10D 30/831: {Vertical FETs having PN junction gate electrodes (Vertical SIT H10D30/202)}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M)
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

Embodiments relate to integrated circuits with protection. In one embodiment the protection is coupled between a first circuit provided to control a low power mode of the integrated circuit and a supply voltage. The protection comprises in an embodiment a transistor being one of a depletion transistor or a junction field effect transistor.

## Claims

### Claim 1

An integrated circuit (IC) comprising:
a first circuit to control a low power mode of the integrated circuit; and
a protection device coupled between the first circuit and a supply voltage and comprising a transistor being one of a high voltage depletion transistor or a high voltage junction field effect transistor (JFET), wherein the protection device provides electromagnetic compatibility (EMC) protection for the IC.

### Claim 2 (depends on 1)

The IC of claim 1, wherein the protection device further comprises a Schottky diode coupled in series with the transistor.

### Claim 3 (depends on 2)

The IC of claim 2, further comprising a resistor coupled in series with the Schottky diode and the transistor.

### Claim 4 (depends on 3)

The IC of claim 3, where the resistor is coupled between the transistor and the first circuit.

### Claim 5 (depends on 2)

The IC of claim 2, wherein the transistor is a vertical JFET, and wherein the vertical JFET and the Schottky diode are arranged in a same n-doped semiconductor region, the n-doped semiconductor region being electrically isolated from a semiconductor substrate.

### Claim 6 (depends on 5)

The IC of claim 5, wherein the vertical JFET and the Schottky diode are electrically connected only in the semiconductor region.

### Claim 7 (depends on 5)

The IC of claim 5, wherein the n-doped semiconductor region is laterally isolated via p-doped trenches.

### Claim 8 (depends on 1)

The IC of claim 1, wherein the first circuit is configured to control a wake-up and sleep mode of a second circuit of the integrated circuit, wherein the second circuit comprises a load circuit and a Schottky diode, wherein the Schottky diode couples the load circuit and the supply voltage.

### Claim 9 (depends on 8)

The IC of claim 8, wherein the first circuit comprises an oscillator circuit, and wherein a voltage provided to the oscillator circuit is about 1.5 Volt.

### Claim 10 (depends on 9)

The IC of claim 9, wherein the oscillator circuit is a low-power low-current oscillator circuit.

### Claim 11 (depends on 8)

The IC of claim 8, wherein a depletion transistor circuit or a JFET circuit is coupled between the supply voltage and the load circuit.

### Claim 12 (depends on 11)

The IC of claim 11, further comprising the Schottky diode coupled between the supply voltage and the depletion transistor circuit.

### Claim 13 (depends on 1)

The IC of claim 1, wherein the current consumption of the first circuit is in a range of about 30 nano-Amps (nA) to about 3 micro-amps (μA).

### Claim 14 (depends on 1)

The IC of claim 1, wherein the first circuit is configured to control a wake-up and sleep mode of a second circuit of the integrated circuit.

### Claim 15 (depends on 1)

The IC of claim 1, wherein the supply voltage is at least 24 Volt and the protection device provides an internal supply voltage between 1.5 Volt and 3.5 Volt.

### Claim 16 (depends on 1)

The IC of claim 1, wherein the protection device is capable to sustain a supply voltage of more than 42 Volt.

### Claim 17 (depends on 16)

The IC of claim 16, wherein the protection device provides a current of not more than 3 micro-Amps (3 μAmps) to the first circuit.

### Claim 18

A method comprising:
managing power consumption of a load by coupling an oscillator to the load to control a wake-up and sleep mode of the load; and
providing electromagnetic compatibility (EMC) protection of the load by coupling a transistor and a resistor in series between a supply voltage and the oscillator, the transistor being one of a depletion transistor or a junction field effect transistor (JFET).