# US 8,786,304 B2 · Semiconductor device including switch for coupling power line

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- Number: US 8,786,304 B2
- Document ID: US8786304B2
- Status: Granted
- Kind: B2
- Application number: 13/184,214
- Filed: 2011-07-15
- Published: 2011-11-03
- Granted: 2014-07-22
- Earliest claimed: 2007-08-20
- Assignees: Fujitsu Limited
- Applicants: Kenichi Kawasaki
- Inventors: Kenichi Kawasaki
- Web page: https://patentgrep.com/patent/US8786304B2

## CPC

- H03K 19/0016: {by using a control or a clock signal, e.g. in order to apply power supply}
- G01R 31/31721: {Power aspects, e.g. power supplies for test circuits, power saving during test (for scan test G01R31/318575)}
- G06F 1/3203: Power management, i.e. event-based initiation of a power-saving mode
- G06F 1/324: by lowering clock frequency
- G06F 1/3287: by switching off individual functional units in the computer system
- Y02D 10/00: Energy efficient computing, e.g. low power processors, power management or thermal management
- H03K: PULSE TECHNIQUE (measuring pulse characteristics G01R; modulating sinusoidal oscillations with pulses H03C; transmission of digital information H04L; discriminator circuits detecting phase difference between two signals by counting or integrating cycles of oscillation H03D3/04; automatic control, starting, synchronisation or stabilisation of generators of electronic oscillations or pulses where the type of generator is irrelevant or unspecified H03L; coding, decoding or code conversion, in general H03M)
- G01R: MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES (indicating correct tuning of resonant circuits H03J3/12)
- G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N)
- Y02D: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE

## Abstract

A semiconductor device whose operational state is switched between a test state and a normal operational state according to a logical value of a signal input from the outside is provided. The semiconductor device includes a first power line, a second power line, a switch that is controlled by a signal line to couple/isolate the first power line to/from the second power line, a control circuit that outputs a control signal, and a state switching circuit that drives the signal line to couple/isolate the first power line to/from the second power line according to a logical value of the control signal when the input signal is one of logical values, whereas the state switching circuit drives the signal line to couple the first power line to the second power line when the first signal is the other logical value.

## Claims

### Claim 1

A semiconductor device comprising:
a first power line;
a second power line;
a switch for selecting coupling of the first power line to the second power line or isolation of the first power line from the second power line based on driving state of the semiconductor device;
a switching circuit for switching the driving state of the semiconductor device from one of a test state and a normal operation state to another of the test state and the normal operation state;
a first control circuit for outputting a signal to the switching circuit, wherein the switching circuit couples the first power line to the second power line or isolates the first power line from the second power line according to a logical value of the signal when test signal is set to a first logical value, whereas the switching circuit couples the first power line to the second power line when test signal is set to a second logical value;
a second control circuit, wherein an operational state of the semiconductor device is switched between the test state and the normal operational state according to the test signal, a code based on a plurality of signals are input to the second control circuit, and the second control circuit outputs a signal having the second logical value as the test signal when the code indicates the test state, whereas the second control circuit outputs a signal having the first logical value as the test signal when the code indicates the normal operational state;
an internal circuit block to be coupled to the second power line;
a latch circuit chain including a latch circuit included in the internal circuit block; and
a signal blocking circuit for feeding a logical value of a data signal through so as to be supplied to the latch circuit chain when the test signal is set to the second logical value.