# US 8,786,267 B2 · Real time adjustable zero current detection for a switching regulator

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- Number: US 8,786,267 B2
- Document ID: US8786267B2
- Status: Granted
- Kind: B2
- Application number: 13/093,205
- Filed: 2011-04-25
- Published: 2011-11-03
- Granted: 2014-07-22
- Earliest claimed: 2010-04-28
- Assignees: Richtek Technology Corporation
- Applicants: Shao-Hung Lu; Isaac Y. Chen; An-Tung Chen
- Inventors: Shao-Hung Lu; Isaac Y. Chen; An-Tung Chen
- Web page: https://patentgrep.com/patent/US8786267B2

## CPC

- H02M 3/1588: {comprising at least one synchronous rectifier element (H02M3/1582, H02M3/1584 take precedence)}
- H02M 1/0009: {Devices or circuits for detecting current in a converter}
- H02M 1/0032: {Control circuits allowing low power mode operation, e.g. in standby mode}
- Y02B 70/10: Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
- H02M: APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF (transformers H01F; dynamo-electric converters H02K47/00; controlling transformers, reactors or choke coils, control or regulation of electric motors, generators or dynamo-electric converters H02P)
- Y02B: CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS

## Abstract

A feedback loop is used to optimize a zero current threshold for a switching regulator. After the low side power switch of the switching regulator turns off, the switching node state is monitored to adjust the zero current threshold in a real time and thus the low-side power switch is prevented from turning off too early or too late. Thereby the efficiency in green mode is optimized.

## Claims

### Claim 1

A real time adjustable zero current detector for a switching regulator including a high-side power switch connected to a low-side power switch through a switching node, the detector comprising:
a feedback loop connected to the switching node, monitoring the switching node state after the low-side power switch turns off to optimize a zero current threshold; and
a comparator connected to the feedback loop and the switching node, comparing a voltage of the switching node with the zero current threshold to trigger a zero current signal.

### Claim 2 (depends on 1)

The detector of claim 1, wherein the feedback loop comprises:
a second comparator connected to the switching node, comparing the voltage of the switching node with a reference voltage to generate a comparison signal;
a timing generation circuit, operative to trigger a timing signal when the low-side power switch turns off;
a control logic connected to the second comparator and the timing generation circuit, responsive to the timing signal to sample the comparison signal to determine an up signal and a down signal;
an up/down counter connected to the control logic, responsive to the up and down signals to increase or decrease a count value;
a digital-to-analog converter connected to the up/down counter, converting the count value into an analog voltage; and
a buffer connected to the digital-to-analog converter, generating the zero current threshold from the analog voltage.

### Claim 3 (depends on 1)

The detector of claim 1, wherein the feedback loop comprises:
a timing generation circuit, operative to trigger a timing signal when the low-side power switch turns off;
a sample-and-hold circuit connected to the switching node and the timing generation circuit, responsive to the timing signal to sample the voltage of the switching node to generate a sample signal;
a second comparator connected to the sample-and-hold circuit, comparing the sample signal with a reference voltage to generate a comparison signal;
an up/down counter connected to the second comparator, responsive to the comparison signal to increase or decrease a count value;
a digital-to-analog converter connected to the up/down counter, converting the count value into an analog voltage; and
a buffer connected to the digital-to-analog converter, generating the zero current threshold from the analog voltage.

### Claim 4 (depends on 1)

The detector of claim 1, wherein the feedback loop comprises:
a second comparator connected to the switching node, comparing the voltage of the switching node with a reference voltage to generate a comparison signal;
a timing generation circuit, operative to trigger a timing signal when the low-side power switch turns off;
a control logic connected to the second comparator and the timing generation circuit, responsive to the timing signal to sample the comparison signal to determine an up signal and a down signal;
a capacitor;
a charge/discharge circuit connected to the control logic and the capacitor, responsive to the up and down signals to charge or discharge the capacitor to generate an analog voltage; and
a buffer connected to the capacitor, generating the zero current threshold from the analog voltage.

### Claim 5 (depends on 4)

The detector of claim 4, wherein the charge/discharge circuit comprises:
a first current source;
a charge switch connected between the first current source and the capacitor, responsive to the up signal to turn on to connect the first current source to the capacitor;
a second current source; and
a discharge switch connected between the second current source and the capacitor, responsive to the down signal to turn on to connect the second current source to the capacitor.

### Claim 6 (depends on 1)

The detector of claim 1, wherein the feedback loop comprises:
a timing generation circuit, operative to trigger a timing signal when the low-side power switch turns off;
a sample-and-hold circuit connected to the switching node and the timing generation circuit, responsive to the timing signal to sample the voltage of the switching node to generate a sample signal;
a second comparator connected to the sample-and-hold circuit, comparing the sample signal with a reference voltage to generate a first comparison signal and a second comparison signal;
a capacitor;
a charge/discharge circuit connected to the second comparator and the capacitor, responsive to the first and second comparison signals to charge or discharge the capacitor to generate an analog voltage; and
a buffer connected to the digital-to-analog converter, generating the zero current threshold from the analog voltage.

### Claim 7 (depends on 6)

The detector of claim 6, wherein the charge/discharge circuit comprises:
a first current source;
a charge switch connected between the first current source and the capacitor, responsive to the first comparison signal to turn on to connect the first current source to the capacitor;
a second current source; and
a discharge switch connected between the second current source and the capacitor, responsive to the second comparison signal to turn on to connect the second current source to the capacitor.

### Claim 8

A real time adjustable zero current detection method for a switching regulator including a high-side power switch connected to a low-side power switch through a switching node, the detection method comprising the steps of:
(A) monitoring the switching node state after the low-side power switch turns off to optimize a zero current threshold; and
(B) comparing a voltage of the switching node with the zero current threshold to trigger a zero current signal.

### Claim 9 (depends on 8)

The detection method of claim 8, wherein the step A comprises the steps of:
comparing the voltage of the switching node with a reference voltage to generate a comparison signal;
triggering a timing signal when the low-side power switch turns off;
sampling the comparison signal responsive to the timing signal to determine an up signal and a down signal;
increasing or decreasing a count value responsive to the up and down signals;
converting the count value into an analog voltage; and
generating the zero current threshold from the analog voltage.

### Claim 10 (depends on 8)

The detection method of claim 8, wherein the step A comprises the steps of:
triggering a timing signal when the low-side power switch turns off;
sampling the voltage of the switching node responsive to the timing signal to generate a sample signal;
comparing the sample signal with a reference voltage to generate a comparison signal;
increasing or decreasing a count value responsive to the comparison signal;
converting the count value into an analog voltage; and
generating the zero current threshold from the analog voltage.

### Claim 11 (depends on 8)

The detection method of claim 8, wherein the step A comprises the steps of:
comparing the voltage of the switching node with a reference voltage to generate a comparison signal;
triggering a timing signal when the low-side power switch turns off;
sampling the comparison signal responsive to the timing signal to determine an up signal and a down signal;
charging or discharging a capacitor responsive to the up and down signals to generate an analog voltage; and
generating the zero current threshold from the analog voltage.

### Claim 12 (depends on 8)

The detection method of claim 8, wherein the step A comprises the steps of:
triggering a timing signal when the low-side power switch turns off;
sampling the voltage of the switching node responsive to the timing signal to generate a sample signal;
comparing the sample signal with a reference voltage to generate a first comparison signal and a second comparison signal;
charging or discharging a capacitor responsive to the first and second comparison signals to generate an analog voltage; and
generating the zero current threshold from the analog voltage.