# US 8,786,084 B2 · Semiconductor package and method of forming

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- Number: US 8,786,084 B2
- Document ID: US8786084B2
- Status: Granted
- Kind: B2
- Application number: 12/751,088
- Filed: 2010-03-31
- Published: 2010-09-30
- Granted: 2014-07-22
- Earliest claimed: 2009-03-31
- Assignees: STMicroelectronics (Grenoble 2) SAS
- Applicants: Romain Coffy; Jean-François Sauty
- Inventors: Romain Coffy; Jean-François Sauty
- Web page: https://patentgrep.com/patent/US8786084B2

## CPC

- H10W 72/075: {of bond wires}
- H10W 72/0198: {batch processes}
- H10W 72/50: Bond wires
- H10W 72/90: Bond pads, in general
- H10W 72/01331: {using blanket deposition}
- H10W 72/01515: {Forming coatings}
- H10W 72/536: {the connected ends being ball-shaped}
- H10W 72/5363: {the connected ends being wedge-shaped}
- H10W 72/552: {comprising metals or metalloids, e.g. silver}
- H10W 72/5522: {comprising gold [Au]}
- H10W 72/5525: {comprising copper [Cu]}
- H10W 72/59: Bond pads specially adapted therefor
- H10W 72/923: {Bond pads having multiple stacked layers}
- H10W 72/952: {comprising metals or metalloids, e.g. PbSn, Ag or Cu}
- H10W 72/983: {Reinforcing structures, e.g. collars}
- H10W 74/00: Encapsulations, e.g. protective coatings
- H10W 74/016: {using moulds}
- H10W 74/114: {by a substrate and the encapsulations}
- H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts}
- H10W 90/754: {between a chip and a stacked insulating package substrate, interposer or RDL}
- Y10T 29/49126: Assembling bases
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- Y10T: TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION

## Abstract

A semiconductor package includes a semiconductor die attached to a support having electrically conductive paths, the semiconductor die having a bond-pad electrically connected to the electrically a conductive path on the support by a bond-wire of a first metallic composition, the bond-wire and the bond-pad being coated with a protection layer of a second metallic composition.

## Claims

### Claim 1

A semiconductor package comprising:
a semiconductor die attached to a support having electrically conductive paths, said semiconductor die having a bond-pad electrically connected to the electrically conductive path on said support by a bond-wire of 99% pure copper, wherein an end of said bond-wire forms a connection junction on a face of said bond-pad,
wherein said bond-wire and said connection junction are coated with a protection layer of a metallic composition, the protective layer having a first layer, the first layer being titanium, and a second layer coating the first layer, the second layer being an alloy of nickel.

### Claim 2 (depends on 1)

The semiconductor package of claim 1, wherein said protection layer is made of an alloy of silver.

### Claim 3 (depends on 1)

The semiconductor package of claim 1, wherein said bond-pad is coated with a protection layer of a metallic composition.

### Claim 4 (depends on 3)

The semiconductor package of claim 3, wherein the protection layer also partially covers said electrically conductive path on the support.

### Claim 5 (depends on 1)

The semiconductor package of claim 1, wherein said support is a substrate for a ball-grid array or a land-grid array package.

### Claim 6 (depends on 3)

The semiconductor package of claim 3, wherein said protective layer on said bond-wire is at least partially contiguous with said protective layer on said bond-pad.

### Claim 7

A process for manufacturing a semiconductor package, the process comprising:
providing a plurality of supports arranged in a matrix on a larger support, each support having electrically conductive paths;
providing a semiconductor die having bond-pads;
then attaching said semiconductor die to one of said plurality of supports;
then electrically connecting a bond-pad of the semiconductor die to an electrically conductive path by a bond-wire of an alloy of copper at 99% purity,
wherein the electrically conductive paths of said plurality of supports are all electrically connected together and the process further comprises electroplating a layer of a second metallic composition onto the bond-wire and the connection junction; and
wherein electroplating comprises electroplating a layer of titanium onto the bond-wire and the connection junction and then electroplating a layer of nickel onto the layer of titanium.

### Claim 8 (depends on 7)

The process of claim 7, wherein the layer of the second metallic composition is an alloy of silver.

### Claim 9 (depends on 7)

The process of claim 7, further comprising the step of attaching a connector for electroplating to a connection point on said larger support.

### Claim 10 (depends on 7)

The process of claim 7, further comprising the steps of:
before the step of electroplating, placing a protective layer on a face of said support not having said semiconductor die attached; and,
after the step of electroplating, removing said protective layer.

### Claim 11 (depends on 7)

The process of claim 7, further comprising the steps of:
after the step of electroplating, placing a block of molding resin on said larger support such that said semiconductor die and said bond-wire are completely covered; and then
sawing said larger support so that said supports are rendered separate.