# US 8,786,072 B2 · Semiconductor package

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- Number: US 8,786,072 B2
- Document ID: US8786072B2
- Status: Granted
- Kind: B2
- Application number: 12/037,557
- Filed: 2008-02-26
- Published: 2008-09-25
- Granted: 2014-07-22
- Earliest claimed: 2007-02-27
- Assignees: International Rectifier Corporation
- Applicants: Martin Standing
- Inventors: Martin Standing
- Web page: https://patentgrep.com/patent/US8786072B2

## CPC

- H10W 70/411: {Chip-supporting parts, e.g. die pads}
- H10W 70/20: Conductive package substrates serving as an interconnection, e.g. metal plates (leadframes H10W70/40)
- H10W 70/413: {Insulating or insulated substrates serving as die pads (H10W70/468 takes precedence)}
- H10W 70/464: {Additional interconnections in combination with leadframes}
- H10W 70/658: {for devices provided for in groups H10D8/00 - H10D48/00}
- H10W 72/60: Strap connectors, e.g. thick copper clips for grounding of power devices
- H10W 72/851: {Dispositions of multiple connectors or interconnections}
- H10W 90/00: Package configurations
- H10W 72/07236: {Soldering or alloying}
- H10W 72/07251: {characterised by changes in properties of the bump connectors during connecting}
- H10W 72/07336: {Soldering or alloying}
- H10W 72/07337: {using a polymer adhesive, e.g. an adhesive based on silicone or epoxy}
- H10W 72/074: {of anisotropic conductive adhesives}
- H10W 72/07636: {Soldering or alloying}
- H10W 72/07637: {using a polymer adhesive, e.g. an adhesive based on silicone or epoxy}
- H10W 72/20: Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W 72/244: {relative to underlying supporting features, e.g. bond pads, RDLs or vias}
- H10W 72/247: {Dispositions of multiple bumps}
- H10W 72/30: Die-attach connectors
- H10W 72/325: {Die-attach connectors having a filler embedded in a matrix}
- H10W 72/352: {comprising metals or metalloids, e.g. solders}
- H10W 72/354: {comprising polymers}
- H10W 72/652: {comprising metals or metalloids, e.g. silver}
- H10W 72/90: Bond pads, in general
- H10W 72/923: {Bond pads having multiple stacked layers}
- H10W 72/926: {Multiple bond pads having different sizes}
- H10W 72/9415: {relative to the surface, e.g. recessed, protruding}
- H10W 90/736: {between a chip and a stacked lead frame, conducting package substrate or heat sink}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A semiconductor package that includes a substrate having a metallic back plate, an insulation body and a plurality of conductive pads on the insulation body, and a semiconductor die coupled to said conductive pads, the conductive pads including regions readied for direct connection to pads external to the package using a conductive adhesive.

## Claims

### Claim 1

A semiconductor package comprising:
a semiconductor die that includes a first electrode on a surface thereof;
a support plate having a first surface and a second surface opposite said first surface;
an insulation body disposed directly on said first surface of said support plate; and
a plurality of laterally spaced conductive pads disposed directly on said insulation body, a first one of said conductive pads including a first region electrically and mechanically coupled to said first electrode with a conductive adhesive body interposed between said first electrode and said first region and a second region readied for connection using a conductive adhesive body to a conductive pad external to said package;
wherein said insulation body electrically insulates said plurality of laterally spaced conductive pads from said support plate.

### Claim 2 (depends on 1)

The package of claim 1, wherein said semiconductor die includes a second electrode lateral to said first electrode on said first surface of said semiconductor die, a second one of said conductive pads including a first region electrically and mechanically coupled to said second electrode with a conductive adhesive body interposed between said second electrode and said first region of said second conductive pad and a second region readied for connection using a conductive adhesive body to a conductive pad external to said package.

### Claim 3 (depends on 1)

The package of claim 1, wherein said semiconductor die includes a third electrode on another opposing surface thereof.

### Claim 4 (depends on 3)

The package of claim 3, wherein said third electrode is readied for connection using a conductive adhesive body to a conductive pad external to said package.

### Claim 5 (depends on 3)

The package of claim 3, further comprising a conductive clip electrically and mechanically coupled to said third electrode using a conductive adhesive body and to a third conductive pad of said plurality of laterally spaced conductive pads, said third conductive pad including a first region electrically and mechanically coupled to said conductive clip with a conductive adhesive body interposed between said conductive clip and said first region and a second region readied for connection using a conductive adhesive body to a conductive pad external to said package.

### Claim 6 (depends on 5)

The package of claim 5, wherein said first region and said second region of each conductive pad are disposed on opposite surfaces of said conductive pad.

### Claim 7 (depends on 6)

The package of claim 6, wherein said conductive pads extend beyond the peripheral edges of said insulation body.

### Claim 8 (depends on 1)

The package of claim 1, wherein said conductive pads are confined within peripheral edges of said insulation body.

### Claim 9 (depends on 1)

The package of claim 1, wherein each conductive pad includes a first region that is readied for electrical and mechanical connection using a conductive adhesive to a respective electrode of a semiconductor die, and a second region readied for electrical and mechanical connection using a conductive adhesive to a respective conductive pad external to said package, wherein said second regions are arranged along opposing edges of said insulation body.

### Claim 10 (depends on 9)

The package of claim 9, wherein said insulation body is generally rectangular and said second regions are disposed at only two opposing edges of said insulation body.

### Claim 11 (depends on 9)

The package of claim 9, wherein said insulation body is generally rectangular and said second regions are disposed along each edge of said insulation body.

### Claim 12 (depends on 11)

The package of claim 11, wherein said semiconductor die is an IC.

### Claim 13 (depends on 1)

The package of claim 1, wherein said support plate is metallic.