# US 8,786,064 B2 · Semiconductor package and method for manufacturing the same and semiconductor package module having the same > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 8,786,064 B2 - Document ID: US8786064B2 - Status: Granted - Kind: B2 - Application number: 13/361,144 - Filed: 2012-01-30 - Published: 2013-05-02 - Granted: 2014-07-22 - Earliest claimed: 2011-10-27 - Assignees: Samsung Electro-Mechanics Co., Ltd. - Applicants: Jin Su Kim; Ji Man Ryu; Soon Gyu Yim - Inventors: Jin Su Kim; Ji Man Ryu; Soon Gyu Yim - Web page: https://patentgrep.com/patent/US8786064B2 ## CPC - H10W 70/417: {Bonding materials between chips and die pads} - H10W 70/411: {Chip-supporting parts, e.g. die pads} - H10W 70/466: {Tape carriers or flat leads} - H10W 70/468: {Circuit boards} - H10W 72/30: Die-attach connectors - H10W 90/811: {Multiple chips on leadframes} - H10W 72/073: {of die-attach connectors} - H10W 72/075: {of bond wires} - H10W 72/50: Bond wires - H10W 72/884: {Die-attach connectors and bond wires} - H10W 74/00: Encapsulations, e.g. protective coatings - H10W 74/10: characterised by their shape or disposition - H10W 74/114: {by a substrate and the encapsulations} - H10W 74/127: {characterised by arrangements for sealing or adhesion} - H10W 90/753: {between laterally-adjacent chips} - H10W 90/756: {between a chip and a stacked lead frame, conducting package substrate or heat sink} - H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10 ## Abstract Disclosed herein is a semiconductor chip, including: a first substrate having a concave formed on one surface thereof and an opening formed on a bottom surface of the concave; a second substrate contacting the other surface of the first substrate; and a semiconductor chip mounted in the concave. ## Claims ### Claim 1 A semiconductor package comprising: a first substrate having top and bottom surfaces, a concave formed on the top surface thereof and an opening formed on a bottom surface of the concave; a second substrate having top and bottom surfaces, the bottom surface of the first substrate disposed on the top surface of the second substrate; a semiconductor chip having top and bottom surfaces, the bottom surface of the semiconductor chip mounted in the concave; and a bonding section interposed between the first substrate and the second substrate, the bonding section being made of solder. ### Claim 2 (depends on 1) The semiconductor package as set forth in claim 1, wherein the bonding section contacts the entire bottom surface of the semiconductor chip mounted in the concave through the opening of the first substrate. ### Claim 3 (depends on 1) The semiconductor package as set forth in claim 1, wherein the first substrate and the second substrate are a metallic substrate, a ceramic substrate, or an epoxy based resin substrate. ### Claim 4 A semiconductor package module, comprising: a first substrate having top and bottom surfaces, one or more concaves formed on the top surface thereof and an opening formed on a bottom surface of the concave; a second substrate having top and bottom surfaces, the bottom surface of the first substrate disposed on the top surface of the second substrate; a first semiconductor chip having top and bottom surfaces, the bottom surface of the first semiconductor chip mounted in the concave; and a bonding section interposed between the first substrate and the second substrate, the bonding section being made of solder, wherein one side of the first substrate protrudes from the second substrate to serve as an external connection terminal. ### Claim 5 (depends on 4) The semiconductor package module as set forth in claim 4, wherein the bonding section contacts the entire bottom surface of the first semiconductor chip mounted in the concave through the opening of the first substrate. ### Claim 6 (depends on 4) The semiconductor package module as set forth in claim 4, wherein the first substrate is a lead frame made of copper (Cu). ### Claim 7 (depends on 4) The semiconductor package module as set forth in claim 4, further comprising: a third substrate disposed on the top surface of the second substrate; and a second semiconductor chip mounted on the third substrate. ### Claim 8 (depends on 7) The semiconductor package module as set forth in claim 7, further comprising the lead frame electrically connected with the third substrate. ### Claim 9 (depends on 7) The semiconductor package module as set forth in claim 7, wherein the third substrate is a printed circuit board (PCB). ### Claim 10 (depends on 4) The semiconductor package module as set forth in claim 4, further comprising one or more first semiconductor chips and a connection member area contacting the top surfaces of the first semiconductor chips and electrically connecting the first semiconductor chips mounted in the one or more concaves to each other. ### Claim 11 (depends on 10) The semiconductor package module as set forth in claim 10, wherein the connection member is a tape type, a frame type, or a ribbon type. ### Claim 12 (depends on 4) The semiconductor package module as set forth in claim 4, further comprising a molding material formed to cover the top surface of the first semiconductor chip from a side surface of the second substrate. ### Claim 13 (depends on 12) The semiconductor package module as set forth in claim 12, wherein a part of an area of the molding material corresponding to the first semiconductor chip is removed in a thickness direction from the surface thereof. ### Claim 14 A semiconductor package module, comprising: a first substrate having a top surface and a bottom surface, one or more concaves formed on the top surface thereof and an opening formed on a bottom surface of the concave; a second substrate having a top surface and a bottom surface, the bottom surface of the first substrate disposed on the top surface of the second substrate; a third substrate having a top surface and a bottom surface, the bottom surface of the third substrate disposed on the top surface of the second substrate; and a first semiconductor chip having a top surface and a bottom surface, the bottom surface of the first semiconductor chip mounted in the concave, wherein one side of the first substrate protrudes from the second substrate to serve as an external connection terminal. ### Claim 15 (depends on 14) The semiconductor package module as set forth in claim 14, further comprising a second semiconductor chip mounted on the third substrate. ### Claim 16 (depends on 14) The semiconductor package module as set forth in claim 14, further comprising the lead frame electrically connected with the third substrate. ### Claim 17 (depends on 14) The semiconductor package module as set forth in claim 14, wherein the third substrate is a printed circuit board (PCB). ### Claim 18 A semiconductor package module, comprising: a first substrate having a top surface and a bottom surface, one or more concaves formed on the top surface thereof and an opening formed on a bottom surface of the concave; a second substrate having a top surface and a bottom surface, the bottom surface of the first substrate disposed on the top surface of the second substrate; one or more first semiconductor chips having a top surface and a bottom surface, respectively, the bottom surfaces of the first semiconductor chips mounted in the concave; and a connection member area contacting the top surfaces of the first semiconductor chips and electrically connecting the first semiconductor chips mounted in the one or more concaves to each other; wherein one side of the first substrate protrudes from the second substrate to serve as an external connection terminal. ### Claim 19 (depends on 18) The semiconductor package module as set forth in claim 18, wherein the connection member is a tape type, a frame type, or a ribbon type. ### Claim 20 A semiconductor package module, comprising: a first substrate having a top surface and a bottom surface, one or more concaves formed on the top surface thereof and an opening formed on a bottom surface of the concave; a second substrate having a top surface and a bottom surface, the bottom surface of the first substrate disposed on the top surface of the second substrate; a first semiconductor chip having a top surface and a bottom surface, the bottom surface of the first semiconductor chip mounted in the concave; and a molding material formed to cover the top surfaces of the first semiconductor chip and a third substrate from a side surface of the second substrate; wherein a part of an area of the molding material corresponding to the first semiconductor chip is removed in a thickness direction from the surface thereof, and wherein one side of the first substrate protrudes from the second substrate to serve as an external connection terminal.