# US 8,786,039 B2 · Method and system for providing magnetic junctions having engineered perpendicular magnetic anisotropy

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- Number: US 8,786,039 B2
- Document ID: US8786039B2
- Status: Granted
- Kind: B2
- Application number: 13/723,172
- Filed: 2012-12-20
- Published: 2014-06-26
- Granted: 2014-07-22
- Earliest claimed: 2012-12-20
- Assignees: Samsung Electronics Co., Ltd.
- Applicants: Dmytro Apalkov; Chang-Man Park; Roman Chepulskyy; Alexey Vasilyevitch Khvalkovskiy; Xueti Tang
- Inventors: Dmytro Apalkov; Chang-Man Park; Roman Chepulskyy; Alexey Vasilyevitch Khvalkovskiy; Xueti Tang
- Web page: https://patentgrep.com/patent/US8786039B2

## CPC

- H10N 50/80: Constructional details
- G11C 11/161: {details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell}
- G11C 11/1675: {Writing or programming circuits or methods}
- H10B 61/10: {comprising components having two electrodes, e.g. diodes or MIM elements}
- H10N 50/01: Manufacture or treatment
- H10N 50/10: Magnetoresistive devices
- H10B 61/22: {of the field-effect transistor [FET] type}
- H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- G11C: STATIC STORES (semiconductor memory devices H10B)
- H10B: ELECTRONIC MEMORY DEVICES

## Abstract

A method and system provide a magnetic junction usable in a magnetic device. The magnetic junction includes a reference layer, a nonmagnetic spacer layer, and a free layer. The nonmagnetic spacer layer is between the reference layer and the free layer. The free layer has an engineered perpendicular magnetic anisotropy. The engineered PMA includes at least one of an insulating insertion layer induced PMA, a stress induced PMA, PMA due to interface symmetry breaking, and a lattice mismatch induced PMA. The magnetic junction is configured such that the free layer is switchable between a plurality of stable magnetic states when a write current is passed through the magnetic junction.

## Claims

### Claim 1

A magnetic junction for use in a magnetic device comprising:
a reference layer;
a nonmagnetic spacer layer; and
a free layer having an engineered perpendicular magnetic anisotropy (PMA), the free layer including a plurality of magnetic layers, the plurality of magnetic layers including at least one oxide layer and a plurality of conductive layers, the at least one oxide layer being ferromagnetic, interleaved with the plurality of conductive layers and sandwiched between the plurality of conductive layers, the nonmagnetic spacer layer being between the reference layer and the free layer, the engineered PMA including at least one of an insulating insertion layer induced PMA, a stress induced PMA, PMA due to interface symmetry breaking, and a lattice mismatch induced PMA;
wherein the magnetic junction is configured such that the free layer is switchable between a plurality of stable magnetic states when a write current is passed through the magnetic junction.

### Claim 2 (depends on 1)

The magnetic junction of claim 1 wherein the engineered PMA includes the insulating insertion layer PMA.

### Claim 3 (depends on 2)

The magnetic junction of claim 2 wherein the at least one oxide layer includes at least one nickel oxide layer.

### Claim 4 (depends on 3)

The magnetic junction of claim 3 wherein the free layer further includes at least one Ni layer adjoining the nickel oxide layer.

### Claim 5 (depends on 1)

The magnetic junction of claim 1 wherein the engineered PMA includes the stress induced PMA and wherein the magnetic junction further includes:
a stress inducing layer, and
a capping layer adjoining the free layer and residing between the free layer and the at least one stress inducing layer.

### Claim 6 (depends on 5)

The magnetic junction of claim 5 wherein the capping layer includes MgO and the stress inducing layer includes Ru.

### Claim 7 (depends on 5)

The magnetic junction of claim 5 wherein the free layer further includes:
a plurality of magnetic layers, the plurality of magnetic layers including at least one oxide layer and a plurality of conductive layers, the at least one oxide layer sandwiched between the plurality of conductive layers.

### Claim 8 (depends on 5)

The magnetic junction of claim 5 further comprising:
an additional stress inducing layer, the reference layer, the free layer and the nonmagnetic spacer layer being between the additional stress inducing layer and the stress inducing layer.

### Claim 9 (depends on 8)

The magnetic junction of claim 8 wherein the stress inducing layer has a first coefficient of thermal expansion and the additional stress inducing layer has a second coefficient of thermal expansion different from the first coefficient of thermal expansion.

### Claim 10 (depends on 8)

The magnetic junction of claim 8 wherein the stress inducing layer and the additional stress inducing layer provide a gradient in a stress of the free layer.

### Claim 11 (depends on 5)

The magnetic junction of claim 5 wherein the stress inducing layer provides a compressive stress on the free layer.

### Claim 12 (depends on 5)

The magnetic junction of claim 5 wherein the stress inducing layer provides a tensile stress on the free layer.

### Claim 13 (depends on 1)

The magnetic junction of claim 1 wherein the engineered PMA includes the lattice mismatch induced PMA, the free layer and the nonmagnetic spacer layer having a lattice mismatch of greater than 5.3%.

### Claim 14 (depends on 13)

The magnetic junction of claim 13 wherein the free layer further includes at least one of Fe1-sRs, CotFe1-t-uMu, CoyFe1-x-y-zBzMx and a modified Heusler alloy, where R is at least one of Al, Ti, Zr, Hf, and Zn and where M is at least one of Al, Bi, Ta, Ti, Zr, Hf, Mo, W, Si, Ge, Sn and Zn.

### Claim 15 (depends on 13)

The magnetic junction of claim 13 wherein the nonmagnetic spacer layer further includes at least one of WO, MgO, TiO, VO, and MgO.

### Claim 16

A magnetic memory comprising:
a plurality of magnetic storage cells, each of the plurality of magnetic storage cells including at least one magnetic junction, the at least one magnetic junction including a pinned layer, a nonmagnetic spacer layer, and a free layer, the free layer having an engineered perpendicular magnetic anisotropy (PMA), the nonmagnetic spacer layer being between the pinned layer and the free layer, the engineered PMA including at least one of an insulating insertion layer induced PMA, a stress induced PMA, PMA due to interface symmetry breaking, and a lattice mismatch induced PMA, the free layer including a plurality of magnetic layers, the plurality of magnetic layers including at least one oxide layer and a plurality of conductive layers, the at least one oxide layer being ferromagnetic, interleaved with the plurality of conductive layers and sandwiched between the plurality of conductive layers, the magnetic junction being configured such that the free layer is switchable between a plurality of stable magnetic states when a write current is passed through the magnetic junction; and
a plurality of bit lines.

### Claim 17 (depends on 16)

The magnetic memory of claim 16 wherein the engineered PMA includes the insulating insertion layer PMA.

### Claim 18 (depends on 17)

The magnetic memory of claim 17 wherein the at least one oxide layer includes at least one nickel oxide layer.

### Claim 19 (depends on 18)

The magnetic memory of claim 18 wherein the free layer further includes at least one Ni layer adjoining the nickel oxide layer.

### Claim 20 (depends on 16)

The magnetic memory of claim 16 wherein the engineered PMA includes the stress induced PMA and wherein the magnetic junction further includes:
a stress inducing layer, and
a capping layer adjoining the free layer and residing between the free layer and the at least one stress inducing layer.

### Claim 21 (depends on 20)

The magnetic memory of claim 20 wherein the capping layer includes MgO and the stress inducing layer includes Ru.

### Claim 22 (depends on 20)

The magnetic memory of claim 20 wherein the free layer further includes:
a plurality of magnetic layers, the plurality of magnetic layers including at least one oxide layer and a plurality of conductive layers, the at least one oxide layer sandwiched between the plurality of conductive layers.

### Claim 23 (depends on 20)

The magnetic memory of claim 20 further comprising:
an additional stress inducing layer, the reference layer, the free layer and the nonmagnetic spacer layer being between the additional stress inducing layer and the stress inducing layer.

### Claim 24 (depends on 23)

The magnetic memory of claim 23 wherein the stress inducing layer has a first coefficient of thermal expansion and the additional stress inducing layer has a second coefficient of thermal expansion different from the first coefficient of thermal expansion.

### Claim 25 (depends on 23)

The magnetic memory of claim 23 wherein the stress inducing layer and the additional stress inducing layer provide a gradient in a stress the free layer.

### Claim 26 (depends on 20)

The magnetic memory of claim 20 wherein the stress inducing layer provides a compressive stress on the free layer.

### Claim 27 (depends on 20)

The magnetic memory of claim 20 wherein the stress inducing layer provides a tensile stress on the free layer.

### Claim 28 (depends on 16)

The magnetic memory of claim 16 wherein the engineered PMA includes the lattice mismatch induced PMA, the free layer and the nonmagnetic spacer layer having a lattice mismatch of greater than 5.3%.

### Claim 29 (depends on 28)

The magnetic memory of claim 28 wherein the free layer further includes at least one of Fe1-sRs, CotFe1-t-uMu, CoyFe1-x-y-zBzMx and a modified Heusler alloy, where R is at least one of Al, Ti, Zr, Hf, and Zn and where M is at least one of Al, Bi, Ta, Ti, Zr, Hf, Mo, W, Si, Ge, Sn and Zn.

### Claim 30 (depends on 28)

The magnetic memory of claim 28 wherein the nonmagnetic spacer layer further includes at least one of WO, MgO, TiO, VO, and MgO.

### Claim 31

A method for providing a magnetic junction for use in a magnetic device comprising:
providing a pinned layer;
providing a nonmagnetic spacer layer; and
providing a free layer having an engineered perpendicular magnetic anisotropy (PMA), the nonmagnetic spacer layer being between the pinned layer and the free layer, the engineered PMA including at least one of an insulating insertion layer induced PMA, a stress induced PMA, PMA due to interface symmetry breaking, and a lattice mismatch induced PMA, the step or providing the free layer including providing a plurality of magnetic layers, the plurality of magnetic layers including at least one oxide layer and a plurality of conductive layers, the at least one oxide layer being ferromagnetic, interleaved with the plurality of conductive layers and sandwiched between the plurality of conductive layers;
wherein the magnetic junction is configured such that the free layer is switchable between a plurality of stable magnetic states when a write current is passed through the magnetic junction.

### Claim 32 (depends on 31)

The method of claim 31 wherein the engineered PMA includes the insulating insertion layer PMA.

### Claim 33 (depends on 32)

The method of claim 32 wherein the at least one oxide layer includes at least one nickel oxide layer.

### Claim 34 (depends on 33)

The method of claim 33 wherein the step of providing the plurality of magnetic layers further includes:
depositing a nickel layer;
oxidizing the nickel layer.

### Claim 35 (depends on 31)

The method of claim 31 wherein the engineered PMA includes the stress induced PMA and wherein the method further includes:
providing a stress inducing layer, and
providing a capping layer adjoining the free layer and residing between the free layer and the at least one stress inducing layer.

### Claim 36 (depends on 35)

The method of claim 35 wherein the capping layer includes MgO and the stress inducing layer includes Ru.

### Claim 37 (depends on 35)

The method of claim 35 wherein the magnetic junction is fabricated on a substrate and wherein the step of providing the free layer further includes:
heating the substrate to a temperature above room temperature; and
depositing the free layer on the substrate while the substrate is at the temperature.

### Claim 38 (depends on 35)

The method of claim 35 further comprising:
an additional stress inducing layer, the reference layer, the free layer and the nonmagnetic spacer layer being between the additional stress inducing layer and the stress inducing layer.

### Claim 39 (depends on 31)

The method of claim 31 wherein the engineered PMA includes the lattice mismatch induced PMA, the free layer and the nonmagnetic spacer layer having a lattice mismatch of greater than 5.3%.

### Claim 40 (depends on 39)

The method of claim 39 wherein the free layer further includes at least one of Fe1-sRs, CotFe1-t-uMu, CoyFe1-x-y-zBzMx and a modified Heusler alloy, where R is at least one of Al, Ti, Zr, Hf, and Zn and where M is at least one of Al, Bi, Ta, Ti, Zr, Hf, Mo, W, Si, Ge, Sn and Zn.