# US 8,786,031 B2 · Metal nitride film, semiconductor device using the metal nitride film, and manufacturing method of semiconductor device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 8,786,031 B2 - Document ID: US8786031B2 - Status: Granted - Kind: B2 - Application number: 13/036,664 - Filed: 2011-02-28 - Published: 2011-09-01 - Granted: 2014-07-22 - Earliest claimed: 2010-03-01 - Assignees: Canon Anelva Corporation - Applicants: Takashi Nakagawa; Naomu Kitano - Inventors: Takashi Nakagawa; Naomu Kitano - Web page: https://patentgrep.com/patent/US8786031B2 ## CPC - H10D 64/01318: {the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN (comprising a layer of alloys of Si, Ge or C H10D64/01314)} - C23C 14/0641: {Nitrides (C23C14/0617 takes precedence)} - H10D 64/037: {comprising charge-trapping insulators} - H10D 64/667: {the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN workfunction layers (having lateral variation H10D64/671)} - H10N 70/021: {Formation of switching materials, e.g. deposition of layers} - H10N 70/026: {by physical vapor deposition, e.g. sputtering} - H10N 70/20: Multistable switching devices, e.g. memristors - H10N 70/826: {adapted for essentially vertical current flow, e.g. sandwich or pillar type devices} - H10N 70/841: {Electrodes} - H10N 70/8833: {Binary metal oxides, e.g. TaOx} - G11C 13/0007: {comprising metal oxide memory material, e.g. perovskites} - H10D 64/021: {using multiple gate spacer layers, e.g. bilayered sidewall spacers} - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - C23C: COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL (making metal-coated products by extrusion B21C23/22; covering with metal by connecting pre-existing layers to articles, see the relevant places, e.g. B21D39/00, B23K; metallising of glass C03C; metallising mortars, concrete, artificial stone, ceramics or natural stone C04B41/00; enamelling of, or applying a vitreous layer to, metals C23D; treating metal surfaces or coating of metals by electrolysis or electrophoresis C25D; single-crystal film growth C30B; by metallising textiles D06M11/83; decorating textiles by locally metallising D06Q1/04) - H10N: ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR - G11C: STATIC STORES (semiconductor memory devices H10B) ## Abstract The present invention provides a metal nitride film that realizes an intended effective work function (for example, a high effective work function) and has EOT exhibiting no change or a reduced change, a semiconductor device using the metal nitride film, and a manufacturing method of the semiconductor device. The metal nitride film according to an embodiment of the present invention contains Ti, Al and N, wherein the metal nitride film has such molar fractions of Ti, Al and N as (N/(Ti+Al+N)) of 0.53 or more, (Ti/(Ti+Al+N)) of 0.32 or less, and (Al/(Ti+Al+N)) of 0.15 or less. ## Claims ### Claim 1 A semiconductor device comprising: a silicon substrate; a gate insulating film provided on the silicon substrate; and a gate electrode provided on the gate insulating film, wherein the insulating film is a high permittivity insulating film including a metal oxide, a metal silicate, a metal oxide into which nitrogen is introduced, or a metal silicate into which nitrogen is introduced, the gate electrode has: a metal-containing layer containing at least one selected from TiN, WN, and Si provided on the gate insulating film, the metal-containing layer not being a film composed of WSi; a metal nitride layer containing Ti, Al, and N provided on the metal-containing layer; and a silicon layer provided on the metal nitride layer, and a molar fraction of Ti, Al, and N of the metal nitride layer, expressed as (N/(Ti+Al+N)), is 0.53 or more a molar fraction of Ti, Al, and N of the metal nitride layer, expressed as (Ti/(Ti+Al+N)), is 0.32 or less; and a molar fraction of Ti, Al, and N of the metal nitride layer, expressed as (Al/(Ti+Al+N)), is 0.15 or less. ### Claim 2 (depends on 1) The semiconductor device according to claim 1, wherein the semiconductor device is a field-effect transistor. ### Claim 3 (depends on 2) The semiconductor device according to claim 2, wherein the field-effect transistor is a P-type MOSFET. ### Claim 4 (depends on 1) The semiconductor device according to claim 1, wherein the silicon substrate is a substrate, at least the surface of which includes a semiconductor layer, and the gate insulating film is a laminated-type gate insulating film. ### Claim 5 (depends on 1) The semiconductor device according to claim 1, wherein an effective work function of the semiconductor device is 4.9 eV or more after an annealing of the semiconductor device. ### Claim 6 A manufacturing method of a semiconductor device comprising the steps of: forming a gate insulating film on a silicon substrate; forming a gate electrode on the gate insulating film; and annealing the formed gate electrode, wherein the step of forming the gate insulating film includes a step of forming a high permittivity insulating film including a metal oxide, a metal silicate, a metal oxide into which nitrogen is introduced, or a metal silicate into which nitrogen is introduced, the step of forming the gate electrode includes: a step of forming a metal-containing layer containing at least one selected from TiN, WN, and Si on the gate insulating film, the metal-containing layer not being a film composed of WSi; a step of forming a metal nitride layer containing Ti, Al, and N on the metal-containing layer; and a step of forming a silicon layer on the metal nitride layer, and a molar fraction of Ti, Al, and N of the metal nitride layer, expressed as (N/(Ti+Al+N)), is 0.53 or more a molar fraction of Ti, Al, and N of the metal nitride layer, expressed as (Ti/(Ti+Al+N)), is 0.32 or less; and a molar fraction of Ti, Al, and N of the metal nitride layer, expressed as (Al/(Ti+Al+N)), is 0.15 or less. ### Claim 7 (depends on 6) The manufacturing method of a semiconductor device according to claim 6, wherein the step of forming the metal nitride film is a step of magnetron-sputtering a Ti target and an Al target, or an alloy target containing Ti and Al under a mixed atmosphere of a reactive gas containing nitrogen and an inert gas in a vacuum chamber. ### Claim 8 (depends on 6) The manufacturing method of a semiconductor device according to claim 6, wherein a supply quantity of the reactive gas is set to be equal to or more than a supply quantity that provides a maximum lowering rate of a sputtering rate caused by nitridation of the surface of the Ti and Al targets, or the alloy target. ### Claim 9 (depends on 8) The manufacturing method of a semiconductor device according to claim 8, wherein the reactive gas is N2, and the supply quantity of the reactive gas is 15 sccm or more. ### Claim 10 (depends on 6) The manufacturing method of a semiconductor device according to claim 6, wherein an effective work function of the semiconductor device is 4.9 eV or more after an annealing of the semiconductor device.