# US 8,785,977 B2 · High speed SiGe HBT and manufacturing method thereof

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- Number: US 8,785,977 B2
- Document ID: US8785977B2
- Status: Granted
- Kind: B2
- Application number: 13/671,755
- Filed: 2012-11-08
- Published: 2014-05-08
- Granted: 2014-07-22
- Earliest claimed: 2012-11-08
- Assignees: Shanghai Hua Hong NEC Electronics Co., Ltd.
- Applicants: Shanghai Hua Hong Nec Electronics Co., Ltd.
- Inventors: Donghua Liu; Wenting Duan; Wensheng Qian; Jun Hu; Jing Shi
- Web page: https://patentgrep.com/patent/US8785977B2

## CPC

- H10D 10/821: {Vertical heterojunction BJTs}
- H10D 10/021: {of heterojunction BJTs [HBT]}
- H10D 10/051: {of vertical BJTs (of heterojunction BJTs H10D10/021; of Schottky BJTs H10D10/031; of thin film BJTs H10D10/041)}
- H10D 10/891: {comprising lattice-mismatched active layers, e.g. SiGe strained-layer transistors}
- H10D 62/115: {Dielectric isolations, e.g. air gaps}
- H10W 10/014: {using trench refilling with dielectric materials, e.g. shallow trench isolations}
- H10W 10/17: formed using trench refilling with dielectric materials, e.g. shallow trench isolations
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

A high-speed SiGe HBT is disclosed, which includes: a substrate; STIs formed in the substrate; a collector region formed beneath the substrate surface and located between the STIs; an epitaxial dielectric layer including two portions, one being located on the collector region, the other being located on one of the STIs; a base region formed both in a region between and on surfaces of the two portions of the epitaxial dielectric layer; an emitter dielectric layer including two portions, both portions being formed on the base region; an emitter region formed both in a region between and on surfaces of the two portions of the emitter dielectric layer; a contact hole formed on a surface of each of the base region, the emitter region and the collector region. A method of manufacturing high-speed SiGe HBT is also disclosed.

## Claims

### Claim 1

A high-speed SiGe HBT, comprising:
a substrate;
shallow trench isolations formed in the substrate;
a collector region formed beneath a surface of the substrate and located between the shallow trench isolations;
an epitaxial dielectric layer including two portions, a first one of the portions being located on the collector region, a second one of the portions being located on one of the shallow trench isolations;
a base region formed both in a region between the two portions of the epitaxial dielectric layer and on surfaces of the two portions of the epitaxial dielectric layer;
an emitter dielectric layer including two portions, both portions being formed on the base region;
an emitter region formed both in a region between the two portions of the emitter dielectric layer and on surfaces of the two portions of the emitter dielectric layer; and
a contact hole, formed on a surface of each of the base region, the emitter region and the collector region.

### Claim 2 (depends on 1)

The high-speed SiGe HBT according to claim 1, wherein the emitter region is formed on the surface of the base region and is located above the collector region.

### Claim 3 (depends on 1)

The high-speed SiGe HBT according to claim 1, further comprising base region isolation sidewalls that are formed on both sides of the base region and the epitaxial dielectric layer.

### Claim 4 (depends on 1)

The high-speed SiGe HBT according to claim 1, further comprising emitter region isolation sidewalls that are formed on both sides of the emitter region and the emitter dielectric layer.

### Claim 5 (depends on 1)

The high-speed SiGe HBT according to claim 1, further comprising metal wires, each metal wire being connected to one of the contact holes.

### Claim 6 (depends on 1)

The high-speed SiGe HBT according to claim 1, wherein the substrate is a P-type substrate.

### Claim 7 (depends on 6)

The high-speed SiGe HBT according to claim 6, wherein the collector region contains an N-type impurity.

### Claim 8 (depends on 6)

The high-speed SiGe HBT according to claim 6, wherein the emitter region contains an N-type impurity.

### Claim 9 (depends on 6)

The high-speed SiGe HBT according to claim 6, wherein the base region contains a P-type impurity.

### Claim 10 (depends on 1)

The high-speed SiGe HBT according to claim 1, wherein a thickness of the epitaxial dielectric layer is 50 Å to 300 Å.

### Claim 11 (depends on 1)

The high-speed SiGe HBT according to claim 1, wherein the epitaxial dielectric layer and the emitter dielectric layer are both formed of an insulating material.