# US 8,785,972 B2 · Semiconductor electrostatic protection circuit device > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 8,785,972 B2 - Document ID: US8785972B2 - Status: Granted - Kind: B2 - Application number: 13/781,263 - Filed: 2013-02-28 - Published: 2013-09-05 - Granted: 2014-07-22 - Earliest claimed: 2012-03-02 - Assignees: Renesas Electronics Corporation - Applicants: Renesas Electronics Corporation - Inventors: Yasuyuki Morishita - Web page: https://patentgrep.com/patent/US8785972B2 ## CPC - H10D 89/713: {including a PNP transistor and a NPN transistor, wherein each of said transistors has its base region coupled to the collector region of the other transistor, e.g. silicon controlled rectifier [SCR] devices} - H10D 18/00: Thyristors - H10D 18/251: {Lateral thyristors} - H10D 62/126: {Top-view geometrical layouts of the regions or the junctions} - H10D 62/115: {Dielectric isolations, e.g. air gaps} - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES ## Abstract An electrostatic protection circuit in a semiconductor device includes a first first-conductivity type well extending in a first direction over a semiconductor substrate, a second first-conductivity type well extending in a second direction over the semiconductor substrate and perpendicular to the first direction with one end coupled to a first long side of the first first-conductivity type well, and a second-conductivity type well formed around the first first-conductivity type well and the second first-conductivity type well. It also includes a first high-concentration second-conductivity type region extending in the second direction on a surface of the second first-conductivity type well and a first high-concentration first-conductivity type region extending in the second direction on a surface of the second-conductivity type well while facing the first high-concentration second-conductivity type region. ## Claims ### Claim 1 A semiconductor electrostatic protection circuit device, comprising: a first first-conductivity type well extending in a first direction over a semiconductor substrate of the semiconductor electrostatic protection circuit device, the first first-conductivity type well having a first long side and a second long side opposite the first long side; at least one second first-conductivity type well extending in a second direction over the semiconductor substrate and perpendicular to the first direction with one end coupled to the second long side of the first first-conductivity type well; a second-conductivity type well formed over the substrate and enclosing the first first-conductivity type well and the at least one second first-conductivity type well; at least one first high-concentration second-conductivity type region extending in the second direction on a surface of the second first-conductivity type well; and at least one first high-concentration first-conductivity type region extending in the second direction on a surface of the second-conductivity type well, the first high-concentration first-conductivity type region facing the first high-concentration second-conductivity type region. ### Claim 2 (depends on 1) The semiconductor electrostatic protection circuit device according to claim 1, further comprising: a second high-concentration first-conductivity type region extending in the first direction as a first trigger tap region on a surface of the first first-conductivity type well. ### Claim 3 (depends on 2) The semiconductor electrostatic protection circuit device according to claim 2, comprising: a plurality of the at least one second first-conductivity type well, a plurality of the at least one first high-concentration second-conductivity type region, and a plurality of the at least one first high-concentration first-conductivity type region. ### Claim 4 (depends on 3) The semiconductor electrostatic protection circuit device according to claim 3, further comprising: a second high-concentration second-conductivity type region extending in the first direction as a second trigger tap region on the surface of the second-conductivity type well, the second high-concentration second-conductivity type region facing the second high-concentration first-conductivity type region with the second first-conductivity type wells sandwiched therebetween. ### Claim 5 (depends on 3) The semiconductor electrostatic protection circuit device according to claim 3, having a layout such that each of the first high-concentration second conductivity type regions has: a long side which faces a long side of at least one of the first high-concentration first-conductivity type regions; and a short side which faces a long side of the second high-concentration first-conductivity type region serving as the first trigger tap region. ### Claim 6 (depends on 2) The semiconductor electrostatic protection circuit device according to claim 2, further comprising: at least one third first-conductivity type well extending in the second direction and having one end coupled to the first long side of the first first-conductivity-type well; at least one third high-concentration second-conductivity type region extending in the second direction on a surface of the third first-conductivity type well; and at least one third high-concentration first-conductivity type region extending in the second direction on the surface of the second-conductivity type well, the third high-concentration first-conductivity type region facing the third high-concentration second-conductivity type region, wherein the second-conductivity type well is formed over the substrate and encloses the first first-conductivity type well, the at least one second first-conductivity type well, and the at least one third first-conductivity type well. ### Claim 7 (depends on 6) The semiconductor electrostatic protection circuit device according to claim 6, comprising: a plurality of the at least one second first-conductivity type well, a plurality of the at least one first high-concentration second-conductivity type region, a plurality of the at least one first high-concentration first-conductivity type region, a plurality of the at least one third first-conductivity type well, a plurality of the at least one third high-concentration second-conductivity type region, and a plurality of the at least one third high-concentration first-conductivity type region. ### Claim 8 (depends on 7) The semiconductor electrostatic protection circuit device according to claim 7, further comprising: a second high-concentration second-conductivity type region extending in the first direction as a second trigger tap region on the surface of the second-conductivity type well, the second high-concentration second-conductivity type region facing the second high-concentration first-conductivity type region with the second first-conductivity type wells sandwiched therebetween; and a fourth high-concentration second-conductivity type region extending in the first direction as a third trigger tap region on the surface of the second-conductivity type well, the fourth high-concentration second-conductivity type region facing the second high-concentration first-conductivity type region with the third first-conductivity type wells sandwiched therebetween. ### Claim 9 (depends on 6) The semiconductor electrostatic protection circuit device according to claim 6, wherein: the first high-concentration first-conductivity type region extends parallel to, and for the same length as, the first high-concentration second-conductivity type region; and the third high-concentration first-conductivity type region extends parallel to, and for the same length as, the third high-concentration second-conductivity type region. ### Claim 10 (depends on 2) The semiconductor electrostatic protection circuit device according to claim 2, having a layout such that: an SCR current ISCR is configured to flow, along the first direction, from the first high-concentration second-conductivity type region to the first high-concentration first-conductivity type region; and a trigger current Itrig is configured to flow, along the second direction, from the first high-concentration second-conductivity type region to the second high-concentration first-conductivity type region. ### Claim 11 (depends on 1) The semiconductor electrostatic protection circuit device according to claim 1, wherein: the first high-concentration first-conductivity type region extends parallel to, and for the same length as, the first high-concentration second-conductivity type region. ### Claim 12 A semiconductor electrostatic protection circuit device, comprising: a first first-conductivity type well extending in a first direction over a semiconductor substrate of the semiconductor electrostatic protection circuit device, the first first-conductivity type well having a first long side and a second long side opposite the first long side; a plurality of second first-conductivity type wells extending in a second direction over the semiconductor substrate and perpendicular to the first direction with one end of each of the plurality of second first-conductivity type wells coupled to the second long side of the first first-conductivity type well; a second-conductivity type well formed over the substrate and enclosing the first first-conductivity type well and the second first-conductivity type wells; a plurality of first high-concentration second-conductivity type regions each extending in the second direction on a surface of each of the plurality of second first-conductivity type wells; a plurality of first high-concentration first-conductivity type regions extending in the second direction on a surface of the second-conductivity type well with each of the first high-concentration second-conductivity type regions being located next to at least one of the first high-concentration first-conductivity type regions; and a second high-concentration first-conductivity type region extending in the first direction as a first trigger tap region on a surface of the first first-conductivity type well. ### Claim 13 (depends on 12) The semiconductor electrostatic protection circuit device according to claim 12, wherein: each of the first high-concentration second-conductivity type regions is between two of the first high-concentration first-conductivity type regions. ### Claim 14 (depends on 13) The semiconductor electrostatic protection circuit device according to claim 13, wherein: each of the first high-concentration second-conductivity type regions has a long side which faces, and extends parallel to, two of said plurality of first high-concentration first-conductivity type regions. ### Claim 15 (depends on 12) The semiconductor electrostatic protection circuit device according to claim 12, having a layout such that: an SCR current ISCR is configured to flow, along the first direction, from each of the first high-concentration second-conductivity type regions to at least one of the first high-concentration first-conductivity type regions; and a trigger current Itrig is configured to flow, along the second direction, from each of the first high-concentration second-conductivity type regions to the second high-concentration first-conductivity type region. ### Claim 16 (depends on 12) The semiconductor electrostatic protection circuit device according to claim 12, wherein: the device has mirror symmetry about a line extending in the first direction through the first first-conductivity type well and the second high-concentration first-conductivity type region. ### Claim 17 (depends on 16) The semiconductor electrostatic protection circuit device according to claim 16, having a layout such that: an SCR current ISCR is configured to flow, along the first direction, from each of the first high-concentration second-conductivity type regions to at least one of the first high-concentration first-conductivity type regions; and a trigger current Itrig is configured to flow, along the second direction, from each of the first high-concentration second-conductivity type regions to the second high-concentration first-conductivity type region. ### Claim 18 (depends on 12) The semiconductor electrostatic protection circuit device according to claim 12, further comprising: a second high-concentration second-conductivity type region extending in the first direction as a second trigger tap region on the surface of the second-conductivity type well, the second high-concentration second-conductivity type region facing the second high-concentration first-conductivity type region with the second first-conductivity type wells sandwiched therebetween. ### Claim 19 (depends on 18) The semiconductor electrostatic protection circuit device according to claim 18, wherein: the device has mirror symmetry about a line extending in the first direction through the first first-conductivity type well and the second high-concentration first-conductivity type region. ### Claim 20 (depends on 19) The semiconductor electrostatic protection circuit device according to claim 19, having a layout such that: an SCR current ISCR is configured to flow, along the first direction, from each of the first high-concentration second-conductivity type regions to at least one of the first high-concentration first-conductivity type regions; and a trigger current Itrig is configured to flow, along the second direction, from each of the first high-concentration second-conductivity type regions to the second high-concentration first-conductivity type region. ### Claim 21 A semiconductor electrostatic protection circuit device, comprising: a first first-conductivity type well extending in a first direction over a semiconductor substrate of the semiconductor electrostatic protection circuit device, the first first-conductivity type well having a first long side and a second long side opposite the first long side; a plurality of first high-concentration second-conductivity type regions extending in a second direction perpendicular to the first direction over the semiconductor substrate; a plurality of first high-concentration first-conductivity type regions extending in the second direction over the semiconductor substrate and facing at least one of the plurality of first high-concentration second-conductivity type regions; a second high-concentration first-conductivity type region extending in the first direction as a first trigger tap region on a surface of the first first-conductivity type well; and a second-conductivity type well formed over the substrate and enclosing the first first-conductivity type well and also the first high-concentration first-conductivity type regions; wherein the electrostatic protection circuit device has a layout such that each of the first high-concentration second conductivity type regions has: a long side which faces a long side of at least one of the first high-concentration first-conductivity type regions; and a short side which faces a long side of the second high-concentration first-conductivity type region serving as the first trigger tap region. ### Claim 22 (depends on 21) The semiconductor electrostatic protection circuit device according to claim 21, having the layout such that: an SCR current ISCR is configured to flow, along the first direction, from each of the first high-concentration second-conductivity type regions to at least one of the first high-concentration first-conductivity type regions; and a trigger current Itrig is configured to flow, along a second direction different from the first direction, from each of the first high-concentration second-conductivity type regions to the second high-concentration first-conductivity type region serving as first trigger tap region.