# US 8,785,944 B2 · High electron mobility transistor

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- Number: US 8,785,944 B2
- Document ID: US8785944B2
- Status: Granted
- Kind: B2
- Application number: 13/707,162
- Filed: 2012-12-06
- Published: 2013-06-13
- Granted: 2014-07-22
- Earliest claimed: 2011-12-07
- Assignees: Samsung Electronics Co., Ltd.
- Applicants: Samsung Electronics Co., Ltd.
- Inventors: In-jun Hwang; Jae-joon Oh; Jae-won Lee; Hyo-ji Choi; Jong-bong Ha
- Web page: https://patentgrep.com/patent/US8785944B2

## CPC

- H10D 84/811: {Combinations of field-effect devices and one or more diodes, capacitors or resistors}
- H10D 30/015: {of FETs having heterojunction interface channels or heterojunction gate electrodes, e.g. HEMT}
- H10D 30/47: having two-dimensional [2D] charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
- H10D 30/471: {High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT]}
- H10D 30/4755: {having wide bandgap charge-carrier supplying layers, e.g. modulation doped HEMTs such as n-AlGaAs/GaAs HEMTs}
- H10D 64/411: {for FETs}
- H10D 62/343: {Gate regions of field-effect devices having PN junction gates}
- H10D 62/8503: {Nitride Group III-V materials, e.g. AlN or GaN}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A high electron mobility transistor (HEMT) according to example embodiments includes a first semiconductor layer, a second semiconductor layer on the first semiconductor layer, and a reverse diode gate structure on the second semiconductor layer. A source and a drain may be on at least one of the first semiconductor layer and the second semiconductor layer. A gate electrode may be on the reverse diode gate structure.

## Claims

### Claim 1

A high electron mobility transistor comprising:
a substrate;
a first semiconductor layer on the substrate;
a second semiconductor layer on the first semiconductor layer;
a source and a drain on at least one of the first semiconductor layer and the second semiconductor layer; and
a gate structure between the source and the drain,
the gate structure including a reverse diode gate structure and a gate electrode,
wherein the reverse diode gate structure includes a first layer, and a second layer on the first layer, and
the second layer is doped with a p-type dopant at a concentration lower than a concentration of p-type dopant in the first layer.

### Claim 2 (depends on 1)

The high electron mobility transistor of claim 1, wherein
the first layer includes a p-type group III nitride semiconductor.

### Claim 3 (depends on 2)

The high electron mobility transistor of claim 2, wherein
the first layer includes at least one of GaN, InGaN, AlGaN, AlInN, and AlGaInN.

### Claim 4 (depends on 1)

The high electron mobility transistor of claim 1, wherein
the second layer includes at least one of GaN, InGaN, AlGaN, AlInN, and AlGaInN.

### Claim 5 (depends on 1)

The high electron mobility transistor of claim 1, wherein the gate electrode has a Schottky gate structure.

### Claim 6 (depends on 1)

The high electron mobility transistor of claim 1, further comprising:
an intermediate layer between the second semiconductor layer and the reverse diode gate structure.

### Claim 7 (depends on 6)

The high electron mobility transistor of claim 6, wherein the intermediate layer includes a group III nitride semiconductor.

### Claim 8 (depends on 7)

The high electron mobility transistor of claim 7, wherein a material of the second semiconductor layer has a larger band gap energy than a band gap energy of a material in the first semiconductor layer.

### Claim 9 (depends on 1)

The high electron mobility transistor of claim 1, wherein the first semiconductor layer and the second semiconductor layer include semiconductor materials having different band gap energies from each other.

### Claim 10 (depends on 1)

The high electron mobility transistor of claim 1, wherein
the first semiconductor layer includes a material that has a different lattice constant than a lattice constant of a material in the second semiconductor layer, and
one of the first semiconductor layer and the second semiconductor layer includes a 2-dimensional electron gas (2DEG) region at an interface between the first semiconductor layer and the second semiconductor layer.

### Claim 11 (depends on 1)

The high electron mobility transistor of claim 1, wherein the gate electrode is on the reverse diode gate structure.

### Claim 12

A high electron mobility transistor comprising:
a substrate;
a first semiconductor layer on the substrate;
a second semiconductor layer on the first semiconductor layer;
a source and a drain on at least one of the first semiconductor layer and the second semiconductor layer; and
a gate structure between the source and the drain,
the gate structure including a reverse diode gate structure and a gate electrode,
wherein an upper surface of the second semiconductor layer defines a recess.

### Claim 13 (depends on 12)

The high electron mobility transistor of claim 12, wherein the gate structure is on the recess defined by the upper surface of the second semiconductor layer.

### Claim 14

A high electron mobility transistor comprising:
a substrate;
a first semiconductor layer on the substrate;
a second semiconductor layer on the first semiconductor layer;
a source and a drain on at least one of the first semiconductor layer and the second semiconductor layer; and
a gate structure between the source and the drain,
the gate structure including a reverse diode gate structure and a gate electrode,
wherein the reverse diode gate structure includes a first layer and a second layer on the first layer,
the first layer includes a p-type group III nitride semiconductor,
wherein the second layer includes:
an undoped group III nitride semiconductor.

### Claim 15 (depends on 14)

The high electron mobility transistor of claim 14, wherein the second layer includes at least one of GaN, InGaN, AlGaN, AlInN, and AlGaInN.

### Claim 16

A high electron mobility transistor comprising:
a substrate;
a first semiconductor layer on the substrate;
a second semiconductor layer on the first semiconductor layer;
a source and a drain on at least one of the first semiconductor layer and the second semiconductor layer; and
a gate structure between the source and the drain,
the gate structure including a reverse diode gate structure and a gate electrode,
wherein the reverse diode gate structure includes a first layer, and
wherein the first layer directly contacts the source.

### Claim 17

A high electron mobility transistor comprising:
a substrate;
a first semiconductor layer on the substrate;
a second semiconductor layer on the first semiconductor layer;
a source and a drain on at least one of the first semiconductor layer and the second semiconductor layer; and
a gate structure between the source and the drain,
the gate structure including a reverse diode gate structure and a gate electrode,
wherein the reverse diode gate structure includes a first layer, and
wherein the gate electrode comprises a metal having a work function of less than or equal to 4.5 eV.

### Claim 18

A high electron mobility transistor comprising:
a substrate;
a first semiconductor layer on the substrate;
a second semiconductor layer on the first semiconductor layer;
a source and a drain on at least one of the first semiconductor layer and the second semiconductor layer; and
a gate structure between the source and the drain,
the gate structure including a reverse diode gate structure and a gate electrode,
wherein the gate electrode includes at least one of W, Hf, and Al.

### Claim 19

A high electron mobility transistor comprising:
a substrate;
a first semiconductor layer on the substrate;
a second semiconductor layer on the first semiconductor layer;
a source and a drain on at least one the first semiconductor layer and the second semiconductor layer; and
a gate structure between the source and the drain,
the gate structure includes a gate electrode and a depletion layer connected to the source.

### Claim 20 (depends on 19)

The high electron mobility transistor of claim 19, wherein the depletion layer includes at least one nitride semiconductor.

### Claim 21 (depends on 20)

The high electron mobility transistor of claim 20, wherein the nitride semiconductor includes at least one of GaN, InGaN, AlGaN, AlInN, and AlGaInN.

### Claim 22 (depends on 20)

The high electron mobility transistor of claim 20, wherein the depletion layer is p-type doped.

### Claim 23 (depends on 19)

The high electron mobility transistor of claim 19, wherein the gate structure does not include an insulating layer between the depletion layer and the gate electrode.

### Claim 24 (depends on 19)

The high electron mobility transistor of claim 19, wherein the gate electrode is directly on the depletion layer.

### Claim 25 (depends on 19)

The high electron mobility transistor of claim 19, further comprising:
a bridge on the second semiconductor layer,
wherein the bridge connects a sidewall of the source to a sidewall of the depletion layer.

### Claim 26 (depends on 19)

The high electron mobility transistor of claim 19, wherein the depletion layer is spaced apart from the drain.

### Claim 27

A high electron mobility transistor comprising:
a first semiconductor layer;
a second semiconductor layer on the first semiconductor layer;
a first electrode, a second electrode, and a third electrode spaced apart on at least one of the first semiconductor layer and the second semiconductor layer,
the second electrode being on a depletion structure and
the depletion structure is spaced part from the third electrode,
wherein the depletion structure does not include a n-type semiconductor.

### Claim 28 (depends on 27)

The high electron mobility transistor of claim 27, wherein the second semiconductor layer is configured to induce a two-dimensional electron gas (2DEG) in the first semiconductor layer.

### Claim 29 (depends on 27)

The high electron mobility transistor of claim 27, wherein
the depletion structure includes a p-type depletion layer between the second electrode and the second semiconductor layer.

### Claim 30 (depends on 29)

The high electron mobility transistor of claim 29, wherein the depletion structure further includes a bridge between a sidewall of the p-type depletion layer and a sidewall of the first electrode.

### Claim 31 (depends on 30)

The high electron mobility transistor of claim 30, further comprising:
a metal layer connected to the sidewall of the first electrode and the bridge,
wherein the metal layer includes a metal having a low work function.

### Claim 32 (depends on 27)

The high electron mobility transistor claim 27, wherein the gate electrode has a Schottky gate structure.

### Claim 33 (depends on 27)

The high electron mobility transistor of claim 27, further comprising:
an intermediate layer on the second semiconductor layer, wherein
the intermediate layer includes an undoped group III nitride semiconductor,
the depletion structure is a reverse diode structure, and
the reverse diode structure is on the intermediate layer.

### Claim 34 (depends on 27)

The high electron mobility transistor of claim 27, wherein
the first semiconductor layer and the second semiconductor layer include semiconductor materials having at least one of different band gap energies from each other, different lattice constants from each other, and different polarizations from each other.

### Claim 35 (depends on 27)

The high electron mobility transistor of claim 27, wherein
the first electrode is a source electrode,
the second electrode is a gate electrode on the second semiconductor layer,
the third electrode is a drain electrode, and
the source electrode and the drain electrode are on at least one of the first semiconductor layer and the second semiconductor layer.

### Claim 36

A high electron mobility transistor comprising:
a first semiconductor layer;
a second semiconductor layer on the first semiconductor layer;
a first electrode, a second electrode, and a third electrode spaced apart on at least one of the first semiconductor layer and the second semiconductor layer,
the second electrode being on a reverse diode structure, wherein
the reverse diode structure includes a first layer including a group III nitride semiconductor doped with a p-type dopant,
the first layer directly contacts the first electrode,
the reverse diode structure includes a second layer on the first layer, and
the second layer includes one of,
a group III nitride semiconductor doped with an n-type dopant,
an undoped group III nitride semiconductor, and
a group III nitride semiconductor doped with a p-type dopant at a concentration lower than a p-type dopant concentration in the first layer.

### Claim 37

A high electron mobility transistor comprising:
a first semiconductor layer;
a second semiconductor layer on the first semiconductor layer;
a first electrode, a second electrode, and a third electrode spaced apart on at least one of the first semiconductor layer and the second semiconductor layer,
the second electrode being on one of a depletion structure and a reverse diode structure,
wherein, if the one of the depletion structure and the reverse diode structure is the depletion structure,
an insulating layer is not between opposing surfaces of the second electrode and the depletion structure, and
the depletion structure is spaced part from the third electrode,
wherein an upper surface of the second semiconductor layer defines a recess.

### Claim 38 (depends on 37)

The high electron mobility transistor of claim 37, wherein the second electrode is on the recess defined by the upper surface of the second semiconductor layer.