# US 8,785,942 B2 · Nitride semiconductor substrate and method of manufacturing the same

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- Number: US 8,785,942 B2
- Document ID: US8785942B2
- Status: Granted
- Kind: B2
- Application number: 13/352,987
- Filed: 2012-01-18
- Published: 2012-08-23
- Granted: 2014-07-22
- Earliest claimed: 2011-02-22
- Assignees: Covalent Materials Corporation
- Applicants: Akira Yoshida; Jun Komiyama; Yoshihisa Abe; Hiroshi Oishi; Kenichi Eriguchi; Shunichi Suzuki
- Inventors: Akira Yoshida; Jun Komiyama; Yoshihisa Abe; Hiroshi Oishi; Kenichi Eriguchi; Shunichi Suzuki
- Web page: https://patentgrep.com/patent/US8785942B2

## CPC

- H10P 14/2901: {Materials}
- H10D 30/4755: {having wide bandgap charge-carrier supplying layers, e.g. modulation doped HEMTs such as n-AlGaAs/GaAs HEMTs}
- H10P 14/24: using chemical vapour deposition [CVD]
- H10P 14/3216: {Nitrides}
- H10P 14/3251: {consisting of three or more layers}
- H10P 14/3416: {Nitrides}
- H10D 62/8503: {Nitride Group III-V materials, e.g. AlN or GaN}
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A nitride semiconductor substrate suitable for a normally-off type high breakdown-voltage device and a method of manufacturing the substrate are provided allowing both a higher threshold voltage and improvement in current collapse. In a nitride semiconductor substrate 10 having a substrate 1, a buffer layer 2 formed on one principal plane of the substrate 1, an intermediate layer 3 formed on the buffer layer 2, an electron transport layer 4 formed on the intermediate layer 3, and an electron supply layer 5 formed on the electron transport layer 4, the intermediate layer 3 has a thickness of 200 nm to 1500 nm and a carbon concentration of 5×1016 atoms/cm3 to 1×1018 atoms/cm3 and is of AlxGa1-xN (0.05≦x≦0.24), and the electron transport layer 4 has a thickness of 5 nm to 200 nm and is of AlyGa1-yN (0≦y≦0.04).

## Claims

### Claim 1

A nitride semiconductor substrate having a substrate, a buffer layer formed on one principal plane of said substrate, an intermediate layer formed on said buffer layer, an electron transport layer formed on said intermediate layer, and an electron supply layer formed on said electron transport layer, wherein
said intermediate layer has a thickness of 200 nm to 1500 nm and a carbon concentration of 5×1016 atoms/cm3 to 1×1018 atoms/cm3 and is of AlxGa1-xN (0.05≦x≦0.24), and said electron transport layer has a thickness of 5 nm to 200 nm and is of AlyGa1-yN (0≦y≦0.04).

### Claim 2 (depends on 1)

The nitride semiconductor substrate as claimed in claim 1, wherein AlN spacer layers are interposed respectively between said intermediate layer and said electron transport layer and between said electron transport layer and said electron supply layer.

### Claim 3 (depends on 1)

The nitride semiconductor substrate as claimed in claim 1, wherein said buffer layer comprises an initial buffer layer and repeatedly deposited layers formed on said initial buffer layer,
said initial buffer layer is such that an AlN layer and an AlzGa1-zN (0≦z≦1) layer are stacked in this order,
said repeatedly deposited layers are such that GaN layers and AlN layer are repeatedly stacked in this order a plurality of times, another GaN layer is further formed to have one set of composite layers, and a plurality of sets are stacked.

### Claim 4 (depends on 2)

The nitride semiconductor substrate as claimed in claim 2, wherein said buffer layer comprises an initial buffer layer and repeatedly deposited layers formed on said initial buffer layer,
said initial buffer layer is such that an AlN layer and an AlzGa1-zN (0≦z≦1) layer are stacked in this order,
said repeatedly deposited layers are such that GaN layers and AlN layer are repeatedly stacked in this order a plurality of times, another GaN layer is further formed to have one set of composite layers, and a plurality of sets are stacked.

### Claim 5 (depends on 1)

A method of manufacturing the nitride semiconductor substrate as claimed in claim 1 by way of a vapor deposition process, wherein a temperature at the time of forming said intermediate layer on said buffer layer is from 970° C. to 1250° C.

### Claim 6 (depends on 2)

A method of manufacturing the nitride semiconductor substrate as claimed in claim 2 by way of a vapor deposition process, wherein a temperature at the time of forming said intermediate layer on said buffer layer is from 970° C. to 1250° C.

### Claim 7 (depends on 3)

A method of manufacturing the nitride semiconductor substrate as claimed in claim 3 by way of a vapor deposition process, wherein a temperature at the time of forming said intermediate layer on said buffer layer is from 970° C. to 1250° C.

### Claim 8 (depends on 4)

A method of manufacturing the nitride semiconductor substrate as claimed in claim 4 by way of a vapor deposition process, wherein a temperature at the time of forming said intermediate layer on said buffer layer is from 970° C. to 1250° C.