# US 8,785,929 B2 · Semiconductor device and method for manufacturing the same > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 8,785,929 B2 - Document ID: US8785929B2 - Status: Granted - Kind: B2 - Application number: 13/926,276 - Filed: 2013-06-25 - Published: 2013-10-31 - Granted: 2014-07-22 - Earliest claimed: 2009-01-23 - Assignees: Semiconductor Energy Laboratory Co., Ltd. - Applicants: Semiconductor Energy Laboratory Co., Ltd. - Inventors: Junichiro Sakata; Takashi Shimazu; Hiroki Ohara; Toshinari Sasaki; Shunpei Yamazaki - Web page: https://patentgrep.com/patent/US8785929B2 ## CPC - H10D 62/83: being Group IV materials, e.g. B-doped Si or undoped Ge - H10D 30/6713: {characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes} - H10D 30/6755: {Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate} - H10D 86/423: {comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO} - H10D 86/60: wherein the TFTs are in active matrices - H10P 14/3426: {Oxides} - H10P 14/3434: {being oxide semiconductor materials (Group IIB-VIA semiconductor materials H10P14/3424)} - H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES - H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10 ## Abstract An object is to provide a semiconductor device including a thin film transistor which includes an oxide semiconductor layer and has high electric characteristics. An oxide semiconductor layer including SiOx is used in a channel formation region, and in order to reduce contact resistance with source and drain electrode layers formed using a metal material with low electric resistance, source and drain regions are provided between the source and drain electrode layers and the oxide semiconductor layer including SiOx. The source and drain regions are formed using an oxide semiconductor layer which does not include SiOx or an oxynitiride film. ## Claims ### Claim 1 A semiconductor device comprising: a gate electrode; an oxide semiconductor layer adjacent to the gate electrode; an insulating layer between the gate electrode and the oxide semiconductor layer; a source electrode electrically connected to the oxide semiconductor layer through a source region; a drain electrode electrically connected to the oxide semiconductor layer through a drain region, wherein the oxide semiconductor layer comprises a portion including silicon, wherein a concentration of silicon in the portion including silicon is larger than a concentration of silicon in the source region and the drain region, wherein the gate electrode comprises a stack of a first layer comprising copper and a second layer comprising a conductive material having heat resistance higher than copper. ### Claim 2 (depends on 1) The semiconductor device according to claim 1, wherein the oxide semiconductor layer comprises indium. ### Claim 3 (depends on 1) The semiconductor device according to claim 1, wherein the oxide semiconductor layer comprises an In—Ga—Zn-based oxide semiconductor. ### Claim 4 (depends on 1) The semiconductor device according to claim 1, wherein the oxide semiconductor layer comprises a channel region that overlaps with the gate electrode. ### Claim 5 (depends on 1) The semiconductor device according to claim 1, wherein a whole of the oxide semiconductor layer overlaps with the gate electrode. ### Claim 6 (depends on 1) The semiconductor device according to claim 1, wherein the gate electrode is provided under the oxide semiconductor layer. ### Claim 7 (depends on 1) The semiconductor device according to claim 1, further comprising a second insulating layer comprising silicon oxide over the oxide semiconductor layer, the source electrode and the drain electrode, wherein the second insulating layer is in contact with an upper surface of the oxide semiconductor layer. ### Claim 8 A semiconductor device comprising: a gate electrode; an oxide semiconductor layer adjacent to the gate electrode; an insulating layer between the gate electrode and the oxide semiconductor layer; a source electrode electrically connected to the oxide semiconductor layer through a source region; a drain electrode electrically connected to the oxide semiconductor layer through a drain region, wherein the oxide semiconductor layer comprises a portion including silicon, wherein a concentration of silicon in the portion including silicon is larger than a concentration of silicon in the source region and the drain region, wherein the gate electrode comprises a stack of a first layer comprising copper and a second layer comprising one selected from the group consisting of titanium, molybdenum and tungsten. ### Claim 9 (depends on 8) The semiconductor device according to claim 8, wherein the oxide semiconductor layer comprises indium. ### Claim 10 (depends on 8) The semiconductor device according to claim 8, wherein the oxide semiconductor layer comprises an In—Ga—Zn-based oxide semiconductor. ### Claim 11 (depends on 8) The semiconductor device according to claim 8, wherein the oxide semiconductor layer comprises a channel region that overlaps with the gate electrode. ### Claim 12 (depends on 8) The semiconductor device according to claim 8, wherein a whole of the oxide semiconductor layer overlaps with the gate electrode. ### Claim 13 (depends on 8) The semiconductor device according to claim 8, wherein the gate electrode is provided under the oxide semiconductor layer. ### Claim 14 (depends on 8) The semiconductor device according to claim 8, wherein the second layer comprises titanium. ### Claim 15 (depends on 8) The semiconductor device according to claim 8, further comprising a second insulating layer comprising silicon oxide over the oxide semiconductor layer, the source electrode and the drain electrode, wherein the second insulating layer is in contact with an upper surface of the oxide semiconductor layer. ### Claim 16 A semiconductor device comprising: a gate electrode; an oxide semiconductor layer adjacent to the gate electrode; an insulating layer between the gate electrode and the oxide semiconductor layer; a source electrode electrically connected to the oxide semiconductor layer through a source region; a drain electrode electrically connected to the oxide semiconductor layer through a drain region, wherein the oxide semiconductor layer comprises a portion including silicon, wherein a concentration of silicon in the portion including silicon is larger than a concentration of silicon in the source region and the drain region, wherein the gate electrode comprises a stack of a first layer comprising copper and a second layer comprising one selected from the group consisting of titanium, molybdenum and tungsten, wherein each of the source region and the drain region comprises nitrogen and oxygen. ### Claim 17 (depends on 16) The semiconductor device according to claim 16, wherein the oxide semiconductor layer comprises indium. ### Claim 18 (depends on 16) The semiconductor device according to claim 16, wherein the oxide semiconductor layer comprises an In—Ga—Zn-based oxide semiconductor. ### Claim 19 (depends on 16) The semiconductor device according to claim 16, wherein the oxide semiconductor layer comprises a channel region that overlaps with the gate electrode. ### Claim 20 (depends on 16) The semiconductor device according to claim 16, wherein a whole of the oxide semiconductor layer overlaps with the gate electrode. ### Claim 21 (depends on 16) The semiconductor device according to claim 16, wherein the gate electrode is provided under the oxide semiconductor layer. ### Claim 22 (depends on 16) The semiconductor device according to claim 16, further comprising a second insulating layer comprising silicon oxide over the oxide semiconductor layer, the source electrode and the drain electrode, wherein the second insulating layer is in contact with an upper surface of the oxide semiconductor layer. ### Claim 23 (depends on 16) The semiconductor device according to claim 16, wherein the second layer comprises titanium. ### Claim 24 A semiconductor device comprising: a gate electrode; an oxide semiconductor layer adjacent to the gate electrode, the oxide semiconductor layer comprising a channel region; an insulating layer between the gate electrode and the oxide semiconductor layer; a source electrode electrically connected to the oxide semiconductor layer through a source region; a drain electrode electrically connected to the oxide semiconductor layer through a drain region, wherein a concentration of silicon in a portion of the oxide semiconductor layer is larger than a concentration of silicon in at least one of the source region and the drain region, wherein the gate electrode comprises a stack of a first layer comprising copper and a second layer comprising a conductive material having heat resistance higher than copper. ### Claim 25 (depends on 24) The semiconductor device according to claim 24, wherein the oxide semiconductor layer comprises an In—Ga—Zn-based oxide semiconductor. ### Claim 26 (depends on 24) The semiconductor device according to claim 24, wherein a whole of the oxide semiconductor layer overlaps with the gate electrode. ### Claim 27 (depends on 24) The semiconductor device according to claim 24, wherein the gate electrode is provided under the oxide semiconductor layer. ### Claim 28 (depends on 24) The semiconductor device according to claim 24, further comprising a second insulating layer comprising silicon oxide over the oxide semiconductor layer, the source electrode and the drain electrode, wherein the second insulating layer is in contact with an upper surface of the oxide semiconductor layer. ### Claim 29 (depends on 24) The semiconductor device according to claim 24, wherein the conductive material is one selected from the group consisting of titanium, molybdenum and tungsten.