# US 8,785,927 B2 · Laminate structure including oxide semiconductor thin film layer, and thin film transistor

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- Number: US 8,785,927 B2
- Document ID: US8785927B2
- Status: Granted
- Kind: B2
- Application number: 13/881,032
- Filed: 2011-12-27
- Published: 2013-08-29
- Granted: 2014-07-22
- Earliest claimed: 2010-12-28
- Assignees: Idemitsu Kosan Co., Ltd.
- Applicants: Kazuaki Ebata; Shigekazu Tomai; Yuki Tsuruma; Shigeo Matsuzaki; Koki Yano
- Inventors: Kazuaki Ebata; Shigekazu Tomai; Yuki Tsuruma; Shigeo Matsuzaki; Koki Yano
- Web page: https://patentgrep.com/patent/US8785927B2

## CPC

- H10D 30/6755: {Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate}
- C23C 14/086: {of zinc, germanium, cadmium, indium, tin, thallium or bismuth}
- H10D 30/031: {of thin-film transistors [TFT]}
- H10D 99/00: Subject matter not provided for in other groups of this subclass
- H10P 14/22: using physical deposition, e.g. vacuum deposition or sputtering
- H10P 14/3238: {being insulating materials}
- H10P 14/3426: {Oxides}
- H10P 14/3434: {being oxide semiconductor materials (Group IIB-VIA semiconductor materials H10P14/3424)}
- H10P 14/3802: {Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- C23C: COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL (making metal-coated products by extrusion B21C23/22; covering with metal by connecting pre-existing layers to articles, see the relevant places, e.g. B21D39/00, B23K; metallising of glass C03C; metallising mortars, concrete, artificial stone, ceramics or natural stone C04B41/00; enamelling of, or applying a vitreous layer to, metals C23D; treating metal surfaces or coating of metals by electrolysis or electrophoresis C25D; single-crystal film growth C30B; by metallising textiles D06M11/83; decorating textiles by locally metallising D06Q1/04)
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A stacked layer structure including an oxide layer and an insulating layer, the oxide layer having a carrier concentration of 1018/cm3 or less and an average crystal diameter of 1 μm or more; and the crystals of the oxide layer being arranged in a columnar shape on the surface of the insulating layer.

## Claims

### Claim 1

A stacked layer structure comprising an oxide layer and an insulating layer,
the oxide layer having a carrier concentration of greater than 1013/cm3 to 1018/cm3 and an average crystal diameter of 1 μm to less than 27 μm; and
the crystals of the oxide layer being arranged in a columnar shape on the surface of the insulating layer.

### Claim 2 (depends on 1)

The stacked layer structure according to claim 1, wherein a material which the oxide layer comprises is selected from indium oxide, Ga-doped indium oxide, Al-doped indium oxide, Zn-doped indium oxide and Sn-doped indium oxide.

### Claim 3 (depends on 2)

The stacked layer structure according to claim 2, wherein the Ga-doped indium oxide has an atomic ratio Ga/(Ga+In) of 0.01 to 0.09.

### Claim 4 (depends on 2)

The stacked layer structure according to claim 2, wherein the Al-doped indium oxide has an atomic ratio Al/(Al+In) of 0.01 to 0.05.

### Claim 5 (depends on 1)

A thin film transistor comprising:
the oxide layer and the insulating layer in the stacked layer structure according to claim 1 as a channel layer and a gate insulating film respectively; and
a protecting film which comprises SiNx being provided on the oxide layer.

### Claim 6 (depends on 5)

A display apparatus comprising the thin film transistor according to claim 5.