# US 8,785,789 B2 · Printed circuit board and method for manufacturing the same

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- Number: US 8,785,789 B2
- Document ID: US8785789B2
- Status: Granted
- Kind: B2
- Application number: 13/402,638
- Filed: 2012-02-22
- Published: 2013-06-27
- Granted: 2014-07-22
- Earliest claimed: 2011-12-22
- Assignees: Samsung Electro-Mechanics Co., Ltd.
- Applicants: Hueng Jae Oh; Boo Yang Jung; Dae Young Lee; Jin Won Choi
- Inventors: Hueng Jae Oh; Boo Yang Jung; Dae Young Lee; Jin Won Choi
- Web page: https://patentgrep.com/patent/US8785789B2

## CPC

- H10W 90/701: {characterised by the relative positions of pads or connectors relative to package parts}
- H05K 1/111: {Pads for surface mounting, e.g. lay-out}
- H05K 3/4007: {Surface contacts, e.g. bumps (H05K3/4092 takes precedence; deposition of finish layers on pads H05K3/24; forming solder bumps H05K3/3465)}
- H10W 70/69: Insulating materials thereof
- H05K 2201/0367: Metallic bump or raised conductor not used as solder bump
- H05K 2201/09845: Stepped hole, via, edge, bump or conductor
- H05K 2203/054: Continuous temporary metal layer over resist, e.g. for selective electroplating
- H05K 2203/0588: Second resist used as pattern over first resist
- H10W 72/012: {of bump connectors, dummy bumps or thermal bumps}
- H10W 72/01235: {by plating, e.g. electroless plating or electroplating}
- H10W 72/01251: {Changing the shapes of bumps}
- H10W 72/01255: {by using masks}
- H10W 72/072: {of bump connectors}
- H10W 72/07236: {Soldering or alloying}
- H10W 72/073: {of die-attach connectors}
- H10W 72/234: {Cross-sectional shape, i.e. in side view}
- H10W 72/241: {Dispositions, e.g. layouts}
- H10W 72/242: {relative to the surface, e.g. recessed, protruding}
- H10W 72/252: {comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu}
- H10W 74/012: {of encapsulations on active surfaces of flip-chip devices, e.g. forming underfills}
- H10W 74/15: on active surfaces of flip-chip devices, e.g. underfills
- H10W 90/724: {between a chip and a stacked insulating package substrate, interposer or RDL}
- Y02P 70/50: Manufacturing or production processes characterised by the final manufactured product
- Y10T 29/49165: by forming conductive walled aperture in base
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H05K: PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- Y02P: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y10T: TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION

## Abstract

Disclosed herein are a printed circuit board (PCB) and a method for manufacturing the same. The PCB includes a base substrate, a circuit layer formed on the base substrate and including a connection pad, a solder resist layer formed on an upper portion of the base substrate and having an opening exposing the connection pad, a metal post formed on upper portions of the connection pad and the solder resist layer and having a plurality of diameters, and a seed layer formed on the upper portion of the solder resist layer and inner walls of the opening along an interface of the metal post.

## Claims

### Claim 1

A printed circuit board (PCB) comprising:
a base substrate;
a circuit layer formed on the base substrate and including a connection pad;
a solder resist layer formed on an upper portion of the base substrate and having an opening exposing the connection pad;
a metal post formed on upper portions of the exposed connection pad and the solder resist layer and having a plurality of diameters; and
a seed layer formed on an upper portion of the solder resist layer and inner walls of the opening along an interface of the metal post,
wherein the metal post comprises:
a first post portion formed within the opening;
a second post portion formed on upper portions of the first post portion and the solder resist layer; and
a third post portion formed on an upper portion of the second post portion,
wherein, in the metal post, the diameter of the third post portion is smaller than that of the second portion, and
wherein the seed layer is formed on a lower surface of the first portion, the second post portion, and the third post portion of the metal post, and the seed layer is formed to have at least two steps like stairs.

### Claim 2 (depends on 1)

The printed circuit board as set forth in claim 1, wherein the seed layer is formed through electroless plating.

### Claim 3 (depends on 1)

The printed circuit board as set forth in claim 1, wherein the metal post is formed through electroplating.

### Claim 4

A method for manufacturing a printed circuit board (PCB), the method comprising:
preparing a base substrate on which a circuit layer including a connection pad is formed; forming a solder resist layer having a first opening exposing the connection pad on an upper portion of the base substrate;
forming a first plated resist layer which has a second opening exposing the first opening and has a diameter greater than that of the first opening on an upper portion of the solder resist layer;
forming a seed layer on an upper portion of the first plated resist layer, on an inner wall of the first opening, and on an inner wall of the second opening;
forming a second plated resist layer which has a third opening exposing the first opening on an upper portion of the seed layer;
plating the interior of the first through third openings to form a metal post;
eliminating the second plated resist layer; eliminating the seed layer exposed through the elimination of the second plated resist layer; and
eliminating the first plated resist layer exposed through the elimination of the seed layer.

### Claim 5 (depends on 4)

The method as set forth in claim 4, wherein, in the forming of the second plated resist layer, the third opening is formed to have a diameter greater than that of the second opening.

### Claim 6 (depends on 4)

The method as set forth in claim 4, wherein, in the forming of the second plated resist layer, the third opening is formed to have a diameter smaller than that of the second opening.

### Claim 7 (depends on 4)

The method as set forth in claim 4, wherein, in the forming of the seed layer, the seed layer is formed through electroless plating.

### Claim 8 (depends on 4)

The method as set forth in claim 4, wherein, in the forming of the metal post, the metal post is formed through electroplating.

### Claim 9 (depends on 4)

The method as set forth in claim 4, further comprising: planarizing the metal post after eliminating the second plated resist layer.

### Claim 10 (depends on 9)

The method as set forth in claim 9, wherein, in the planarizing of the metal post, the metal post is planarized through a polishing process.