# US 8,785,305 B2 · Backside stress compensation for gallium nitride or other nitride-based semiconductor devices

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- Number: US 8,785,305 B2
- Document ID: US8785305B2
- Status: Granted
- Kind: B2
- Application number: 12/927,931
- Filed: 2010-11-30
- Published: 2011-06-16
- Granted: 2014-07-22
- Earliest claimed: 2009-12-11
- Assignees: National Semiconductor Corporation
- Applicants: Jamal Ramdani
- Inventors: Jamal Ramdani
- Web page: https://patentgrep.com/patent/US8785305B2

## CPC

- H10P 14/3802: {Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth}
- H10D 30/4755: {having wide bandgap charge-carrier supplying layers, e.g. modulation doped HEMTs such as n-AlGaAs/GaAs HEMTs}
- H10P 14/2905: {Silicon, silicon germanium or germanium}
- H10P 14/3216: {Nitrides}
- H10P 14/3416: {Nitrides}
- H10P 14/3454: {Amorphous}
- H10P 14/3456: {Polycrystalline}
- H10P 14/36: {characterised by treatments done before the formation of the materials}
- H10D 62/8503: {Nitride Group III-V materials, e.g. AlN or GaN}
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A method includes forming a stress compensation layer over a first side of a semiconductor substrate and forming a Group III-nitride layer over a second side of the substrate. Stress created on the substrate by the Group III-nitride layer is at least partially reduced by stress created on the substrate by the stress compensation layer. Forming the stress compensation layer could include forming a stress compensation layer from amorphous or microcrystalline material. Also, the method could include crystallizing the amorphous or microcrystalline material during subsequent formation of one or more layers over the second side of the substrate. Crystallizing the amorphous or microcrystalline material could occur during subsequent formation of the Group III-nitride layer and/or during an annealing process. The amorphous or microcrystalline material could create no or a smaller amount of stress on the substrate, and the crystallized material could create a larger amount of stress on the substrate.

## Claims

### Claim 1

A method comprising:
forming a stress compensation layer over a first side of a semiconductor substrate;
forming a Group III-nitride layer over a second side of the semiconductor substrate; and
forming a thermal stress management layer including an aluminum nitride layer and multiple aluminum gallium nitride layers with different gallium concentrations;
wherein stress created on the semiconductor substrate by the Group III-nitride layer is at least partially reduced by stress created on the semiconductor substrate by the stress compensation layer.

### Claim 2 (depends on 1)

The method of claim 1, wherein:
forming the stress compensation layer comprises forming a stress compensation layer from amorphous or microcrystalline material; and
the method further comprises crystallizing the amorphous or microcrystalline material during subsequent formation of one or more layers over the second side of the semiconductor substrate.

### Claim 3 (depends on 2)

The method of claim 2, wherein crystallizing the amorphous or microcrystalline material comprises crystallizing the amorphous or microcrystalline material during subsequent formation of the Group III-nitride layer.

### Claim 4 (depends on 2)

The method of claim 2, wherein crystallizing the amorphous or microcrystalline material comprises crystallizing the amorphous or microcrystalline material during an annealing process.

### Claim 5 (depends on 2)

The method of claim 2, wherein:
the amorphous or microcrystalline material creates no stress or a smaller amount of stress on the semiconductor substrate; and
the crystallized material creates a larger amount of stress on the semiconductor substrate.

### Claim 6 (depends on 1)

The method of claim 1, wherein forming the Group III-nitride layer comprises:
forming a nucleation layer over the second side of the semiconductor substrate;
forming the thermal stress management layer over the nucleation layer;
forming an epitaxial buffer layer over the thermal stress management layer; and
forming an epitaxial barrier layer over the buffer layer.

### Claim 7 (depends on 6)

The method of claim 6, wherein:
the nucleation layer comprises an aluminum nitride layer;
the buffer and barrier layers comprise aluminum gallium nitride layers with different aluminum concentrations; and
the stress compensation layer comprises an aluminum nitride layer.

### Claim 8 (depends on 6)

The method of claim 6, wherein the epitaxial buffer layer has a thickness greater than 3 μm.

### Claim 9

An apparatus comprising:
a semiconductor substrate;
a stress compensation layer over a first side of the semiconductor substrate;
a Group III-nitride layer over a second side of the semiconductor substrate; and
a thermal stress management layer comprising an aluminum nitride layer and multiple aluminum gallium nitride layers with different gallium concentrations;
wherein the apparatus is configured such that stress created on the semiconductor substrate by the Group III-nitride layer is at least partially reduced by stress created on the semiconductor substrate by the stress compensation layer.

### Claim 10 (depends on 9)

The apparatus of claim 9, wherein:
the stress compensation layer comprises a crystallized form of an amorphous or microcrystalline material;
the amorphous or microcrystalline material creates no stress or a smaller amount of stress on the semiconductor substrate; and
the crystallized material creates a larger amount of stress on the semiconductor substrate.

### Claim 11 (depends on 9)

The apparatus of claim 9, wherein the Group III-nitride layer comprises:
an epitaxial buffer layer over the thermal stress management layer and a nucleation layer; and
an epitaxial barrier layer over the buffer layer.

### Claim 12 (depends on 11)

The apparatus of claim 11, wherein:
the nucleation layer comprises an aluminum nitride layer;
the epitaxial buffer and epitaxial barrier layers comprise aluminum gallium nitride layers with different aluminum concentrations; and
the stress compensation layer comprises an aluminum nitride layer.

### Claim 13 (depends on 11)

The apparatus of claim 11, wherein the epitaxial buffer layer has a thickness greater than 3 μm.

### Claim 14 (depends on 9)

The apparatus of claim 9, further comprising:
a passivation layer over the Group III-nitride layer.

### Claim 15

A system comprising:
a semiconductor structure comprising:
a semiconductor substrate;
a stress compensation layer over a first side of the semiconductor substrate;
a Group III-nitride layer over a second side of the semiconductor substrate; and
a Group III-nitride integrated circuit device in or over the Group III-nitride layer; and
a thermal stress management layer comprising an aluminum nitride layer and multiple aluminum gallium nitride layers with different gallium concentrations;
wherein the semiconductor structure is configured such that stress created on the semiconductor substrate by the Group III-nitride layer is at least partially reduced by stress created on the semiconductor substrate by the stress compensation layer.

### Claim 16 (depends on 15)

The system of claim 15, wherein:
the stress compensation layer comprises a crystallized form of an amorphous or microcrystalline material;
the amorphous or microcrystalline material creates no stress or a smaller amount of stress on the semiconductor substrate; and
the crystallized material creates a larger amount of stress on the semiconductor substrate.

### Claim 17 (depends on 15)

The system of claim 15, wherein the Group III-nitride layer comprises:
an epitaxial buffer layer over the thermal stress management layer and a nucleation layer; and
an epitaxial barrier layer over the buffer layer.

### Claim 18 (depends on 17)

The system of claim 17, wherein:
the nucleation layer comprises an aluminum nitride layer;
the buffer and barrier layers comprise aluminum gallium nitride layers with different aluminum concentrations; and
the stress compensation layer comprises an aluminum nitride layer.

### Claim 19 (depends on 17)

The system of claim 17, wherein the epitaxial buffer layer has a thickness greater than 3 μm.

### Claim 20 (depends on 15)

The system of claim 15, wherein the Group III-nitride integrated circuit device comprises at least one of: a Group III-nitride field effect transistor (FET) and a Group III-nitride high electron mobility transistor (HEMT).