# US 8,785,290 B2 · Method for manufacturing semiconductor device having element isolation portions

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- Number: US 8,785,290 B2
- Document ID: US8785290B2
- Status: Granted
- Kind: B2
- Application number: 13/746,532
- Filed: 2013-01-22
- Published: 2013-08-08
- Granted: 2014-07-22
- Earliest claimed: 2012-02-02
- Assignees: Canon Kabushiki Kaisha
- Applicants: Canon Kabushiki Kaisha
- Inventors: Hiroaki Naruse
- Web page: https://patentgrep.com/patent/US8785290B2

## CPC

- H10W 10/13: formed using local oxidation of silicon [LOCOS], e.g. sealed interface localised oxidation [SILO] or side-wall mask isolation [SWAMI]
- H10D 62/115: {Dielectric isolations, e.g. air gaps}
- H10W 10/0128: {comprising multiple local oxidation process steps}
- H10P 30/222: {characterised by the angle between the ion beam and the crystal planes or the main crystal surface (characterised by the angle between the ion beam and the mask H10P30/221)}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A method for manufacturing a semiconductor device, the method comprising, forming an opening in an insulating layer, which is formed on a semiconductor substrate, using a photoresist pattern formed on the insulating layer as a mask, forming a first element isolation portion in the semiconductor substrate by implanting an ion into the semiconductor substrate using the photoresist pattern as a mask, forming a second element isolation portion, in the semiconductor substrate, whose outer edge is outside an outer edge of the opening, by implanting an ion into the semiconductor substrate through the opening, and forming a third element isolation portion, which is inside the outer edge of the second element isolation portion, by embedding an insulating member in the opening and removing the insulating layer.

## Claims

### Claim 1

A method for manufacturing a semiconductor device, the method comprising:
forming an opening in an insulating layer, which is formed on a semiconductor substrate, using a photoresist pattern formed on the insulating layer as a mask;
forming a first element isolation portion in the semiconductor substrate by implanting an ion into the semiconductor substrate using the photoresist pattern as a mask;
forming a second element isolation portion, in the semiconductor substrate, whose outer edge is outside an outer edge of the opening, by implanting an ion into the semiconductor substrate through the opening; and
forming a third element isolation portion, which is inside the outer edge of the second element isolation portion, by embedding an insulating member in the opening and removing the insulating layer.

### Claim 2 (depends on 1)

The method according to claim 1, wherein the forming the second element isolation portion is performed after the forming the first element isolation portion.

### Claim 3 (depends on 2)

The method according to claim 2, further comprising:
removing the photoresist pattern after the forming the first element isolation portion and before the forming the second element isolation portion.

### Claim 4 (depends on 1)

The method according to claim 1, wherein, in the forming the first element isolation portion, the ion is implanted at an implantation intensity higher than an implantation intensity in the forming the second element isolation portion.

### Claim 5 (depends on 1)

The method according to claim 1, wherein letting W1 be a width of the first element isolation portion, W2 be a width of the second element isolation portion, and W3 be a width of the third element isolation portion, W2>W1 and W2>W3.

### Claim 6

A method for manufacturing a semiconductor device, the method comprising:
forming an opening in an insulating layer, which is formed on a semiconductor substrate, using a photoresist pattern formed on the insulating layer as a mask;
forming a first element isolation portion in the semiconductor substrate by implanting an ion into the semiconductor substrate using the photoresist pattern as a mask;
removing the photoresist pattern after the forming the first element isolation portion;
forming a second element isolation portion, in the semiconductor substrate, whose outer edge is outside an outer edge of the opening, by implanting an ion into the semiconductor substrate through the opening at an implantation intensity lower than an implantation intensity in the forming the first element isolation portion, after the removing the photoresist pattern; and
forming a third element isolation portion, providing electrical insulation, which is inside the outer edge of the second element isolation portion, by embedding an insulating member in the opening and removing the insulating layer.

### Claim 7 (depends on 6)

The method according to claim 6, wherein letting W1 be a width of the first element isolation portion, W2 be a width of the second element isolation portion, and W3 be a width of the third element isolation portion, W2>W1 and W2>W3.