# US 8,785,233 B2 · Solar cell emitter region fabrication using silicon nano-particles > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 8,785,233 B2 - Document ID: US8785233B2 - Status: Granted - Kind: B2 - Application number: 13/720,060 - Filed: 2012-12-19 - Published: 2014-06-19 - Granted: 2014-07-22 - Earliest claimed: 2012-12-19 - Assignees: SunPower Corporation - Applicants: SunPower Corporation - Inventors: Paul Loscutoff; David D. Smith; Michael Morse; Ann Waldhauer; Taeseok Kim; Steven Edward Molesa - Web page: https://patentgrep.com/patent/US8785233B2 ## CPC - H10F 71/1221: {comprising polycrystalline silicon} - H10F 10/146: {Back-junction photovoltaic cells, e.g. having interdigitated base-emitter regions on the back side} - H10F 71/121: {The active layers comprising only Group IV materials} - H10F 77/122: comprising only Group IV materials - H10F 77/14: Shape of semiconductor bodies; Shapes, relative sizes or dispositions of semiconductor regions within semiconductor bodies - H10F 77/147: {Shapes of bodies} - H10F 77/1625: {Semiconductor nanoparticles embedded in semiconductor matrix} - H10F 77/1642: {including only Group IV materials} - H10F 77/219: {Arrangements for electrodes of back-contact photovoltaic cells} - H10F 77/703: {of the semiconductor bodies, e.g. textured active layers} - Y02E 10/50: Photovoltaic [PV] energy - Y02E 10/546: Polycrystalline silicon PV cells - Y02E 10/547: Monocrystalline silicon PV cells - Y02P 70/50: Manufacturing or production processes characterised by the final manufactured product - Y10S 977/939: Electron emitter, e.g. spindt emitter tip coated with nanoparticles - Y10S 977/948: Energy storage/generating using nanostructure, e.g. fuel cell, battery - H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION - Y02E: REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION - Y02P: CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS - Y10S: TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS ## Abstract Methods of fabricating solar cell emitter regions using silicon nano-particles and the resulting solar cells are described. In an example, a method of fabricating an emitter region of a solar cell includes forming a region of doped silicon nano-particles above a dielectric layer disposed above a surface of a substrate of the solar cell. A layer of silicon is formed on the region of doped silicon nano-particles. At least a portion of the layer of silicon is mixed with at least a portion of the region of doped silicon nano-particles to form a doped polycrystalline silicon layer disposed on the dielectric layer. ## Claims ### Claim 1 A method of fabricating an emitter region of a solar cell, the method comprising: forming a region of doped silicon nano-particles above a dielectric layer disposed above a surface of a substrate of the solar cell; forming a layer of silicon on the region of doped silicon nano-particles; and mixing at least a portion of the layer of silicon with at least a portion of the region of doped silicon nano-particles to form a doped polycrystalline silicon layer disposed on the dielectric layer. ### Claim 2 (depends on 1) The method of claim 1, wherein forming the region of doped silicon nano-particles comprises printing or spin-on coating a region of doped silicon nano-particles having an average particles size approximately in the range of 5-100 nanometers and a porosity approximately in the range of 10-50%, with at least some open pores. ### Claim 3 (depends on 1) The method of claim 1, wherein forming the layer of silicon comprises forming a layer of un-doped, intrinsic, or lightly doped amorphous silicon from silane (SiH4) in a low pressure chemical vapor deposition (LPCVD) chamber at a temperature approximately in the range of 525-565 degrees Celsius. ### Claim 4 (depends on 1) The method of claim 1, wherein forming the layer of silicon comprises forming a portion of the silicon layer within the region of doped silicon nano-particles and closing one or more open pores of the region of doped silicon nano-particles with a portion of the layer of silicon. ### Claim 5 (depends on 4) The method of claim 4, wherein closing the one or more open pores of the region of doped silicon nano-particles with the portion of the layer of silicon comprises forming closed pores having angular edges, and wherein mixing the portion of the layer of silicon with the portion of the region of doped silicon nano-particles to form the doped polycrystalline silicon layer comprises modifying the closed pores having angular edges to form rounded closed pores. ### Claim 6 (depends on 1) The method of claim 1, wherein mixing the portion of the layer of silicon with the portion of the region of doped silicon nano-particles to form the doped polycrystalline silicon layer comprises heating the substrate to a temperature approximately in the range of 700-1100 degrees Celsius. ### Claim 7 (depends on 1) The method of claim 1, wherein mixing the portion of the layer of silicon with the portion of the region of doped silicon nano-particles to form the doped polycrystalline silicon layer comprises reducing a combined thickness of the layer of silicon and the region of doped silicon nano-particles by an amount approximately in the range of 20-50%. ### Claim 8 (depends on 1) The method of claim 1, wherein the region of doped silicon nano-particles is formed to a thickness approximately in the range of 0.2-3 microns, and the layer of silicon is formed to an absolute thickness approximately in the range of 200-2000 Angstroms. ### Claim 9 (depends on 1) The method of claim 1, wherein the doped silicon nano-particles are P-type doped silicon nano-particles, and the doped polycrystalline silicon layer is a P-type doped polycrystalline silicon layer. ### Claim 10 (depends on 9) The method of claim 9, further comprising: forming a region of N-type doped silicon nano-particles above the dielectric layer, adjacent to but not in contact with the region of P-type doped silicon nano-particles; forming the layer of silicon on the region of N-type doped silicon nano-particles; and mixing at least a portion of the layer of silicon with at least a portion of the region of N-type doped silicon nano-particles to form an N-type doped polycrystalline silicon layer disposed on the dielectric layer. ### Claim 11 (depends on 1) The method of claim 1, wherein the doped silicon nano-particles are N-type doped silicon nano-particles, and the doped polycrystalline silicon layer is an N-type doped polycrystalline silicon layer. ### Claim 12 (depends on 1) The method of claim 1, wherein the dielectric layer is formed on the substrate and is a tunnel dielectric layer for the emitter region. ### Claim 13 (depends on 1) The method of claim 1, wherein the surface of the substrate is a back surface of the substrate, opposite a light receiving surface of the substrate, the method further comprising: forming a metal contact on the doped polycrystalline silicon layer. ### Claim 14 A method of fabricating an emitter region of a solar cell, the method comprising: forming a region of doped silicon nano-particles above a dielectric layer disposed above a back surface of a substrate of the solar cell, the back surface opposite a light-receiving surface of the solar cell; forming a layer of silicon on both the light-receiving surface and above the back surface of the substrate, including a portion on the region of doped silicon nano-particles and a portion on the dielectric layer; mixing the portion of the layer of silicon formed on the region of doped silicon nano-particles with at least a portion of the region of doped silicon nano-particles to form a doped polycrystalline silicon layer disposed on the dielectric layer; oxidizing the layer of silicon on the light-receiving surface of the substrate, the portion of the layer of silicon on the dielectric layer, and an outermost region of the doped polycrystalline silicon layer to form a silicon oxide layer on the light receiving surface and above the back surface of the substrate; and forming an anti-reflective coating layer on the silicon oxide layer on the light receiving surface and on the silicon oxide layer above the back surface of the substrate. ### Claim 15 (depends on 14) The method of claim 14, wherein forming the silicon oxide layer on the light receiving surface and above the back surface of the substrate comprises heating the substrate in the presence of oxygen (O2), water vapor (H2), or nitrous oxide (N2O) in a low pressure chemical vapor deposition (LPCVD) chamber. ### Claim 16 (depends on 14) The method of claim 14, wherein forming the anti-reflective coating layer on the silicon oxide layer comprises forming a silicon nitride layer in a low pressure chemical vapor deposition (LPCVD) chamber. ### Claim 17 (depends on 14) The method of claim 14, further comprising: forming a metal contact to the doped polycrystalline silicon layer. ### Claim 18 A method of fabricating an emitter region of a solar cell, the method comprising: forming a region of N-Type doped silicon nano-particles and a region of P-type doped silicon nano-particles above a dielectric layer disposed above a back surface of a substrate of the solar cell, the back surface opposite a light-receiving surface of the solar cell, and the region of N-Type doped silicon nano-particles adjacent to but not in contact with the region of P-type doped silicon nano-particles; forming a layer of silicon at least above the back surface of the substrate, including a portion on the regions of N-type and P-type doped silicon nano-particles and a portion on the dielectric layer; mixing the portion of the layer of silicon formed on the regions of N-type and P-type doped silicon nano-particles with at least a portion of each of the regions of N-type and P-type doped silicon nano-particles to form an N-type doped polycrystalline silicon layer and a P-type doped polycrystalline silicon layer, respectively, each disposed on the dielectric layer; oxidizing the portion of the layer of silicon on the dielectric layer, and an outermost region of the each of the N-type and P-type doped polycrystalline silicon layers to form a silicon oxide layer above the back surface of the substrate; masking and etching the silicon oxide layer above the back surface of the substrate to provide an N-type doped polysilicon region and a P-type doped polycrystalline silicon region separated by a trench formed in the back surface of the substrate, each of the N-type doped polysilicon region and the P-type doped polycrystalline silicon region retaining a portion of the silicon oxide layer thereon; and forming an anti-reflective coating layer on the N-type doped polysilicon region and the P-type doped polycrystalline silicon region and in the trench. ### Claim 19 (depends on 18) The method of claim 18, further comprising: prior to forming the anti-reflective coating layer, texturizing the light-receiving surface. ### Claim 20 (depends on 18) The method of claim 18, further comprising: subsequent to masking and etching the silicon oxide layer and prior to forming the anti-reflective coating layer, diffusing N-type dopants into the substrate.