# US 8,785,221 B2 · Method for making light emitting diode

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- Number: US 8,785,221 B2
- Document ID: US8785221B2
- Status: Granted
- Kind: B2
- Application number: 13/479,234
- Filed: 2012-05-23
- Published: 2013-06-06
- Granted: 2014-07-22
- Earliest claimed: 2011-12-03
- Assignees: Tsinghua University; Hon Hai Precision Industry Co., Ltd.
- Applicants: Zhen-Dong Zhu; Qun-Qing Li; Li-Hui Zhang; Mo Chen; Shou-Shan Fan
- Inventors: Zhen-Dong Zhu; Qun-Qing Li; Li-Hui Zhang; Mo Chen; Shou-Shan Fan
- Web page: https://patentgrep.com/patent/US8785221B2

## CPC

- H10H 20/018: {Bonding of wafers}
- H10H 20/01: Manufacture or treatment
- H10H 20/821: of the light-emitting regions, e.g. non-planar junctions
- H10P 14/24: using chemical vapour deposition [CVD]
- H10P 14/2901: {Materials}
- H10P 14/2921: {being crystalline insulating materials}
- H10P 14/3216: {Nitrides}
- H10P 14/3256: {Microstructure}
- H10P 14/3416: {Nitrides}
- H10P 14/36: {characterised by treatments done before the formation of the materials}
- H10H: INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10

## Abstract

A method for making light emitting diode is provided. The method includes following steps. A substrate is provided. A first semiconductor layer is grown on a surface of the substrate. A patterned mask layer is located on a surface of the first semiconductor layer, and the patterned mask layer includes a number of bar-shaped protruding structures, a slot is defined between each two adjacent protruding structures to expose a portion of the first semiconductor layer. The exposed first semiconductor layer is etched to form a protruding pair. A number of three-dimensional nano-structures are formed by removing the patterned mask layer. An active layer and a second semiconductor layers are grown on the number of three-dimensional nano-structures in that order. A first electrode is electrically connected with the first semiconductor layer. A second electrode is electrically connected with the second semiconductor layer.

## Claims

### Claim 1

A method for making a light emitting diode, comprising:
providing a substrate have an epitaxial growth surface;
growing a first semiconductor layer on the epitaxial growth surface of the substrate;
locating a patterned mask layer on a surface of the first semiconductor layer, wherein the patterned mask layer comprises a plurality of bar-shaped protruding structures aligned side by side, and a slot is defined between each two adjacent protruding structures of the plurality of bar-shaped protruding structures to expose a portion of the first semiconductor layer;
etching the exposed portions of the first semiconductor layer, wherein each two adjacent protruding structures begin to slant face to face until they are contacting each other to form a protruding pair;
forming a plurality of three-dimensional nano-structures by removing the patterned mask layer;
growing an active layer and a second semiconductor layer on a surface of the plurality of three-dimensional nano-structures in that order;
applying a first electrode electrically to connect with the first semiconductor layer; and
locating a second electrode electrically to connect with the second semiconductor layer.

### Claim 2 (depends on 1)

The method of claim 1, wherein the each two adjacent protruding structures gradually slant and tops of the each two adjacent protruding structures gradually approach each other.

### Claim 3 (depends on 2)

The method of claim 2, wherein a first part of the first semiconductor layer corresponding to each of the protruding pairs is etched at a first speed, and a second part of the first semiconductor layer exposed from each two adjacent protruding pairs is etched at a second speed, and the first speed is less than the second speed.

### Claim 4 (depends on 3)

The method of claim 3, wherein a first groove is defined on the first part of the first semiconductor layer, and a second groove is defined on the second part of the first semiconductor layer.

### Claim 5 (depends on 4)

The method of claim 4, wherein a depth of the first groove is less than a depth of the second groove.

### Claim 6 (depends on 5)

The method of claim 5, wherein the depth of the first groove ranges from about 30 nanometers to about 120 nanometers, and the depth of the second groove ranges from about 100 nanometers to about 200 nanometers.

### Claim 7 (depends on 1)

The method of claim 1, wherein the first semiconductor layer is etched in an inductively coupled plasma device, and a power of the inductively coupled plasma device ranges from about 20 watts to about 100 watts.

### Claim 8 (depends on 7)

The method of the claim 7, wherein the substrate is etched by:
etching the surface of the first semiconductor layer to form a plurality of grooves with substantially the same depth;
further etching the first semiconductor layer so that the each two adjacent protruding structures begin to slant face to face; and
further etching the first semiconductor layer so that the each two adjacent protruding structures gradually slant until the top of the each two adjacent protruding structures are contacting each other.

### Claim 9 (depends on 7)

The method of claim 7, wherein an etching gas comprising Cl2, BCl3, O2, and Ar is used in the etching process.

### Claim 10 (depends on 9)

The method of claim 9, wherein a flow speed of the etching gas ranges from about 8 sccm to about 150 sccm, a pressure of the etching gas ranges from about 0.5 Pa to about 15 Pa, and an etching time ranges from about 5 seconds to about 5 minutes.

### Claim 11 (depends on 10)

The method of claim 10, wherein a flow speed of the Cl2 ranges from about 2 sccm to about 60 sccm, a flow speed of the BCl3 ranges from about 2 sccm to about 30 sccm, a flow speed of the O2 ranges from about 3 sccm to about 40 sccm, and a flow speed of the Ar ranges from about 1 sccm to about 20 sccm.

### Claim 12 (depends on 1)

The method of claim 1, wherein the patterned mask layer is formed by the following steps:
placing a mask layer on the surface of the first semiconductor layer;
forming a plurality of bar-shaped protruding structures aligned side by side by nanoimprinting the mask layer, wherein a slot is defined between each two adjacent protruding structures of the plurality of bar-shaped protruding structures; and
exposing the substrate by etching the mask layer through the slot.

### Claim 13 (depends on 1)

The method of claim 1, wherein the patterned mask layer comprises a first mask layer and a second mask layer stacked on the first semiconductor layer in that order, and the material of the first mask layer is different from that of the second mask layer.

### Claim 14 (depends on 13)

The method of claim 13, wherein the patterned mask layer is patterned by the following steps:
providing a template with a plurality of protruding structures aligned side by side and extending substantially along the same direction;
attaching the template on the second mask layer;
pressing the template toward the second mask layer and removing the template to form a plurality of slots in the second mask layer;
exposing the first mask layer by etching the second mask layer on the bottom of the slots through the slots; and
exposing the first semiconductor layer by etching the exposed first mask layer.

### Claim 15 (depends on 1)

The method of claim 1, wherein the plurality of three-dimensional nano-structures is periodically aligned.

### Claim 16 (depends on 15)

The method of claim 15, wherein a period of the plurality of the three-dimensional nano-structures ranges from about 100 nanometers to about 500 nanometers.

### Claim 17 (depends on 1)

The method of claim 1, wherein the active layer grows on the plurality of three-dimensional nano-structures via a horizontal growth method to form a planar surface of the active layer away from the first semiconductor layer.

### Claim 18 (depends on 1)

The method of claim 1, wherein the active layer grows on the plurality of three-dimensional nano-structures via a vertical growth method to form a patterned surface of the active layer away from the first semiconductor layer.

### Claim 19 (depends on 18)

The method of claim 18, wherein the patterned surface of the active layer comprises a plurality of grooves and peaks.

### Claim 20

A method for making light emitting diode, comprising:
providing a substrate having an epitaxial growth surface;
growing a first semiconductor layer on the epitaxial growth surface;
forming a plurality of three-dimensional nano-structures on a surface of the first semiconductor layer, wherein each of the plurality of three-dimensional nano-structures has a first peak and a second peak aligned side by side, a first groove is defined between the first peak and the second peak, a second groove is defined between each two adjacent three-dimensional nano-structures of the plurality of three-dimensional nano-structures, and a depth of the first groove is less than a depth of the second groove;
growing an active layer and a second semiconductor layer on the plurality of three-dimensional nano-structures;
applying a first electrode to electrically connect with the first semiconductor layer; and
applying a second electrode to electrically connect with the second semiconductor layer.