# US 8,785,115 B2 · Photoresist removal method and patterning process utilizing the same

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- Number: US 8,785,115 B2
- Document ID: US8785115B2
- Status: Granted
- Kind: B2
- Application number: 13/370,226
- Filed: 2012-02-09
- Published: 2013-08-15
- Granted: 2014-07-22
- Earliest claimed: 2012-02-09
- Assignees: United Microelectronics Corp.
- Applicants: Hung-Yi Wu; Yuan-Chi Pai; Yu-Wei Cheng; Chang-Mao Wang
- Inventors: Hung-Yi Wu; Yuan-Chi Pai; Yu-Wei Cheng; Chang-Mao Wang
- Web page: https://patentgrep.com/patent/US8785115B2

## CPC

- H10P 50/287: {by chemical means}
- H10D 84/0177: {the gate conductors having different materials or different implants}
- H10D 84/038: {using silicon technology, e.g. SiGe}
- H10P 50/71: {using masks for conductive or resistive materials}
- H10D 84/0184: {Manufacturing their gate sidewall spacers}
- H10P: GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

A photoresist removal method is described. A substrate having thereon a positive photoresist layer to be removed is provided. The positive photoresist layer is UV-exposed without using a photomask. A development liquid is used to remove the UV-exposed positive photoresist layer. The substrate as provided may further have thereon a sacrificial masking layer under the positive photoresist layer. The sacrificial masking layer is removed after the UV-exposed positive photoresist layer is removed.

## Claims

### Claim 1

A photoresist removal method, comprising:
providing a substrate having thereon a patterned positive photoresist layer to be removed and a patterned sacrificial masking layer between the patterned positive photoresist layer and the substrate;
UV-exposing the patterned positive photoresist layer without using a photomask;
using a development liquid to remove the UV-exposed patterned positive photoresist layer; and
removing the patterned sacrificial masking layer.

### Claim 2 (depends on 1)

The photoresist removal method of claim 1, wherein the positive photoresist layer on the substrate provided is a patterned positive photoresist layer.

### Claim 3 (depends on 2)

The photoresist removal method of claim 2, wherein the patterned positive photoresist layer exposes a part of a MOS transistor.

### Claim 4 (depends on 3)

The photoresist removal method of claim 3, wherein the exposed part of the MOS transistor includes a gate dielectric layer of the MOS transistor.

### Claim 5 (depends on 4)

The photoresist removal method of claim 4, wherein the gate dielectric layer of the MOS transistor comprises a high-K layer.

### Claim 6 (depends on 1)

The photoresist removal method of claim 1, wherein the patterned sacrificial masking layer comprises a patterned bottom anti-reflective coating (BARC).

### Claim 7 (depends on 6)

The photoresist removal method of claim 6, wherein the patterned BARC comprises a patterned light-absorbing oxide material (DUO).

### Claim 8 (depends on 6)

The photoresist removal method of claim 6, wherein removing the patterned sacrificial masking layer comprises using a solvent.

### Claim 9

A patterning process, comprising:
providing a substrate having thereon a material layer to be patterned;
forming a sacrificial masking layer over the material layer;
forming a patterned positive photoresist layer over the sacrificial masking layer;
patterning the sacrificial masking layer using the patterned positive photoresist layer as a mask;
removing the material layer not under the patterned positive photoresist layer;
UV-exposing the patterned positive photoresist layer without using a photomask; and
using a development liquid to remove the UV-exposed patterned positive photoresist layer; and
removing the patterned sacrificial masking layer.

### Claim 10 (depends on 9)

The patterning process of claim 9, wherein the sacrificial masking layer comprises a bottom anti-reflective coating (BARC).

### Claim 11 (depends on 10)

The patterning process of claim 10, wherein the BARC comprises a light-absorbing oxide material (DUO).

### Claim 12 (depends on 10)

The patterning process of claim 10, wherein removing the patterned sacrificial masking layer comprises using a solvent.

### Claim 13 (depends on 9)

The patterning process of claim 9, wherein a part of a first MOS transistor is exposed after the material layer not under the patterned positive photoresist layer is removed.

### Claim 14 (depends on 13)

The patterning process of claim 13, wherein
the material layer comprising a gate material of a second MOS transistor, and
the exposed part of the first MOS transistor comprises a gate dielectric layer of the first MOS transistor.

### Claim 15 (depends on 14)

The patterning process of claim 14, wherein the gate material comprises a work-function metal, and the gate dielectric layer comprises a high-K layer.

### Claim 16 (depends on 14)

The patterning process of claim 14, wherein one of the first and the second MOS transistors is a NMOS transistor and the other is a PMOS transistor.