# US 8,783,949 B2 · Self-calibrating, wide-range temperature sensor

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- Number: US 8,783,949 B2
- Document ID: US8783949B2
- Status: Granted
- Kind: B2
- Application number: 12/620,392
- Filed: 2009-11-17
- Published: 2011-05-19
- Granted: 2014-07-22
- Earliest claimed: 2009-11-17
- Assignees: Atmel Corporation
- Applicants: Jed Griffin; Daniel J. Russell
- Inventors: Jed Griffin; Daniel J. Russell
- Web page: https://patentgrep.com/patent/US8783949B2

## CPC

- G01K 7/01: using semiconducting elements having PN junctions (G01K7/02, G01K7/16, G01K7/30 take precedence)
- G01K 15/005: {Calibration}
- G01K: MEASURING TEMPERATURE; MEASURING QUANTITY OF HEAT; THERMALLY-SENSITIVE ELEMENTS NOT OTHERWISE PROVIDED FOR (radiation pyrometry G01J5/00)

## Abstract

A self-calibrating, wide-range temperature sensor includes a current reference, impervious to process and voltage, with the current reference mirrored into two oppositely-sized bipolar transistors or diodes. Duplicate current sources are used with a ratio of geometries between them, such that the larger current biases the smaller bipolar transistor (less cross-sectional area) and the smaller current source biases the larger bipolar transistor (higher cross-sectional area). The current source in conjunction with the differential temperature sensing provides inherent calibration without drift while the differential sensing, from the ratio of geometries in the current paths also increases sensitivity.

## Claims

### Claim 1

A temperature sensor circuit, comprising:
a current reference circuit coupled to a pair of current sources having a ratio of geometries between them, the current reference circuit configured to provide a first reference current and a second reference current, where the first reference current is larger than the second reference current by an amount determined by the ratio of geometries, wherein the current reference circuit comprises:
a first transistor having a source terminal and a drain terminal, where the source terminal of the first transistor is coupled to a first current source of the pair of current sources;
a second transistor having a source terminal coupled to a second current source of the pair of current sources, where respective gates of the first and second transistors are coupled together and to a drain terminal of the second transistor;
a third transistor having a source terminal coupled to the drain terminal of the second transistor; and
a third bipolar transistor having base and collector terminals coupled to a reference voltage and an emitter terminal coupled to the drain terminal of the first transistor; and
a differential sensing path circuit coupled to the current reference circuit, the differential sensing path circuit including at least one pair of oppositely-sized bipolar transistors or diodes, the differential sensing path circuit configured to bias a first bipolar transistor or diode with the first reference current and to bias a second bipolar transistor or diode with the second reference current, where the first bipolar transistor or diode has a smaller cross-sectional area than a cross-sectional area of the second bipolar transistor or diode.

### Claim 2 (depends on 1)

The circuit of claim 1, where a regulated voltage is applied to a node coupled to a drain terminal of the first transistor and the emitter terminal of the third bipolar transistor.

### Claim 3 (depends on 1)

The circuit of claim 1, where the first transistor is an n-channel, complementary metal-oxide-semiconductor (CMOS) transistor with a high-threshold voltage and is biased in a subthreshold region.

### Claim 4 (depends on 1)

The circuit of claim 1, where the first transistor is an n-channel, complementary metal-oxide-semiconductor (CMOS) transistor with a low-threshold voltage and is biased in a saturation region.

### Claim 5

A temperature sensor circuit, comprising:
a current reference circuit coupled to a pair of current sources having a ratio of geometries between them, the current reference circuit configured to provide a first reference current and a second reference current, where the first reference current is larger than the second reference current by an amount determined by the ratio of geometries; and
a differential sensing path circuit coupled to the current reference circuit, the differential sensing path circuit including at least one pair of oppositely-sized bipolar transistors, the differential sensing path circuit configured to bias a first bipolar transistor with the first reference current and to bias a second bipolar transistor with the second reference current, where the first bipolar transistor has a smaller cross-sectional area than a cross-sectional area of the second bipolar transistor, where the differential sensing path circuit further comprises a number of differential sensing paths, a first sensing path including the first bipolar transistor, and a second sensing path including the second bipolar transistor, the first sensing path and the second sensing path each further comprises a CMOS transistor having a drain terminal coupled to an emitter terminal of the respective bipolar transistor in the respective sensing path.

### Claim 6 (depends on 5)

The circuit of claim 5, where the circuit is configured to provide a voltage variation, ΔVbe, given by
Δ
⁢
⁢
V
be
≈
N
⁢
nk
⁢
⁢
ln
⁡
(
s
b
⁢
σ
)
q
⁢
T
,
where s and b are controllable geometry parameters, σ is a ratio of cross-sectional areas in the bipolar transistors or diodes, k is a Boltzmann constant, q is a charge constant, T is temperature, and N is an integer having a value based at least in part on the number of sensing paths in the differential sensing path circuit.