Semiconductor device
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorShunpei Yamazaki
Life of this patent
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Abstract
An embodiment is a semiconductor device which includes a first oxide semiconductor layer over a substrate having an insulating surface and including a crystalline region formed by growth from a surface of the first oxide semiconductor layer toward an inside; a second oxide semiconductor layer over the first oxide semiconductor layer; a source electrode layer and a drain electrode layer which are in contact with the second oxide semiconductor layer; a gate insulating layer covering the second oxide semiconductor layer, the source electrode layer, and the drain electrode layer; and a gate electrode layer over the gate insulating layer and in a region overlapping with the second oxide semiconductor layer. The second oxide semiconductor layer is a layer including a crystal formed by growth from the crystalline region.
Claims65
A semiconductor device comprising:
- a gate electrode layer;
- a gate insulating layer over the gate electrode layer;
- a first oxide semiconductor layer over the gate electrode layer with the gate insulating layer interposed therebetween;
- a second oxide semiconductor layer on the first oxide semiconductor layer;
- a source electrode layer and a drain electrode layer over and electrically connected to the second oxide semiconductor layer,
- wherein the first oxide semiconductor layer comprises indium and zinc,
- wherein the second oxide semiconductor layer comprises indium and zinc,
- wherein the second oxide semiconductor layer comprises a first crystalline region,
- wherein the first crystalline region has a c-axis aligned in a direction substantially perpendicular to a surface of the second oxide semiconductor layer,
- wherein the first oxide semiconductor layer comprises a second crystalline region, and
- wherein the second crystalline region has a c-axis aligned in a direction substantially perpendicular to a surface of the first oxide semiconductor layer.
A semiconductor device comprising:
- a first oxide semiconductor layer;
- a second oxide semiconductor layer on the first oxide semiconductor layer;
- a source electrode layer and a drain electrode layer over and electrically connected to the second oxide semiconductor layer;
- a gate insulating layer over the second oxide semiconductor layer, the source electrode layer, and the drain electrode layer;
- a gate electrode layer over the second oxide semiconductor layer with the gate insulating layer interposed therebetween,
- wherein the first oxide semiconductor layer comprises indium and zinc,
- wherein the second oxide semiconductor layer comprises indium and zinc,
- wherein the second oxide semiconductor layer comprises a first crystalline region,
- wherein the first crystalline region has a c-axis aligned in a direction substantially perpendicular to a surface of the second oxide semiconductor layer,
- wherein the first oxide semiconductor layer comprises a second crystalline region, and
- wherein the second crystalline region has a c-axis aligned in a direction substantially perpendicular to a surface of the first oxide semiconductor layer.
A semiconductor device comprising:
- a first gate electrode layer;
- a first gate insulating layer over the first gate electrode layer;
- a first oxide semiconductor layer over the first gate electrode layer with the first gate insulating layer interposed therebetween;
- a second oxide semiconductor layer on the first oxide semiconductor layer;
- a source electrode layer and a drain electrode layer over and electrically connected to the second oxide semiconductor layer,
- a second gate insulating layer over the second oxide semiconductor layer, the source electrode layer, and the drain electrode layer,
- a second gate electrode layer over the first gate electrode layer with the second gate insulating layer interposed therebetween,
- wherein the first oxide semiconductor layer comprises indium and zinc,
- wherein the second oxide semiconductor layer comprises indium and zinc,
- wherein the second oxide semiconductor layer comprises a first crystalline region, and
- wherein the first crystalline region has a c-axis aligned in a direction substantially perpendicular to a surface of the second oxide semiconductor layer.
A semiconductor device comprising:
- a gate electrode layer;
- a first oxide semiconductor layer adjacent to the gate electrode layer with a gate insulating layer interposed therebetween;
- a second oxide semiconductor layer on the first oxide semiconductor layer;
- a source electrode layer and a drain electrode layer over and electrically connected to the second oxide semiconductor layer,
- wherein the first oxide semiconductor layer comprises indium and zinc,
- wherein the second oxide semiconductor layer comprises indium and zinc,
- wherein the second oxide semiconductor layer comprises a crystalline region,
- wherein the crystalline region has a c-axis aligned in a direction substantially perpendicular to a surface of the second oxide semiconductor layer,
- wherein the crystalline region comprises a layer parallel with an a-axis and a b-axis of the crystalline region, and
- wherein the layer comprises indium.
Dependencies are inferred from the claim text.