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US 8,773,562 B1Granted
Vertically stacked image sensor
AssigneeApple Inc.
InventorXiaofeng Fan
Life of this patent
Estimating the term…
Abstract
A vertically stacked image sensor having a photodiode chip and a transistor array chip. The photodiode chip includes at least one photodiode and a transfer gate extends vertically from a top surface of the photodiode chip. The image sensor further includes a transistor array chip stacked on top of the photodiode chip. The transistor array chip includes the control circuitry and storage nodes. The image sensor further includes a logic chip vertically stacked on the transistor array chip. The transfer gate communicates data from the at least one photodiode to the transistor array chip and the logic chip selectively activates the vertical transfer gate, the reset gate, the source follower gate, and the row select gate.
Claims14
An image sensor for an electronic device, comprising:
- a photodiode chip comprising:
- at least one photodiode for receiving light;
- a transfer gate extending vertically from a top surface of the photodiode chip;
- a transistor array chip in communication with the photodiode chip and vertically stacked on the photodiode chip, the transistor array chip comprising:
- a floating diffusion node in communication with the at least one photodiode;
- a reset gate in communication with the at least one photodiode;
- a source follower gate in communication with the floating diffusion node;
- and
- a row select gate in communication with the source follower gate and the floating diffusion node;
- and
- a logic chip operably vertically stacked on the transistor array chip and in communication therewith;
- wherein
- the transfer gate communicates data from the at least one photodiode to the transistor array chip and is connected to the transistor array chip, wherein the transfer gate comprises:
- a semiconductor transfer channel;
- an oxide layer surrounding an outer perimeter surface of the transfer channel;
- a polysilicon layer at least partially surrounding an outer perimeter surface of the oxide layer;
- and
- a metal layer in communication with the transfer channel, wherein the transfer channel extends vertically from the to surface of the photodiode chip and the metal layer communicatively connects the transfer gate to the transistor array chip;
- and
- the logic chip selectively activates the vertical transfer gate, the reset gate, the source follower gate, and the row select gate.
17 more elements
A mobile electronic device, comprising:
- a processor;
- a display screen in communication with the processor;
- a memory component in communication with the processor and the display screen;
- and
- at least one image capture element in communication with the processor, the at least one image capture element comprising:
- a lens;
- and
- an image sensor in optical communication with the lens, the image sensor comprising a three-chip vertical stack including a control circuitry chip, a photodiode chip, and a logic chip, wherein
- the photodiode chip includes one or more photodiodes;
- and
- one or more transfer gates extending vertically between the photodiode chip and the control circuitry chip to couple the photodiode chip to the control circuitry chip, wherein at least one photodiode is in communication with a respective transfer gate and the transfer gate comprises:
- a semiconductor transfer channel;
- an oxide layer surrounding an outer perimeter surface of the transfer channel;
- a polysilicon layer at least partially surrounding an outer perimeter surface of the oxide layer;
- and
- a metal layer in communication with the transfer channel, wherein the transfer channel extends vertically from a top surface of the photodiode chip and the metal layer communicatively connects the transfer gate to the control circuitry chip.
13 more elements
An image sensor for an electronic device, comprising:
- a photodiode chip defining a plurality of pixels, each pixel comprising:
- a photodiode for receiving light;
- a transfer gate extending vertically from a top surface of the photodiode chip;
- a transistor array chip in communication with the photodiode chip and vertically stacked on the photodiode chip, the transistor array chip comprising:
- a floating diffusion node in communication with the photodiode;
- a reset gate in communication with the photodiode;
- a source follower gate in communication with the floating diffusion node;
- and
- a row select gate in communication with the source follower gate and the floating diffusion node;
- and
- a logic chip operably vertically stacked on the transistor array chip and in communication therewith;
- wherein
- the transfer gate communicates data from the photodiode to the transistor array chip and is connected to the transistor array chip, wherein the transfer gate comprises:
- a semiconductor transfer channel;
- an oxide layer surrounding an outer perimeter surface of the transfer channel;
- a polysilicon layer at least partially surrounding an outer perimeter surface of the oxide layer;
- and
- a metal layer in communication with the transfer channel, wherein the metal layer communicatively connects the transfer date to the transistor array chip;
- and
- the logic chip selectively activates the vertical transfer gate, the reset gate, the source follower gate, and the row select gate.
17 more elements
Dependencies are inferred from the claim text.