# US 8,772,907 B1 · Anti-fuse structure and anti-fuse programming method

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- Number: US 8,772,907 B1
- Document ID: US8772907B1
- Status: Granted
- Kind: B1
- Application number: 13/726,242
- Filed: 2012-12-24
- Published: 2014-06-26
- Granted: 2014-07-08
- Earliest claimed: 2012-12-24
- Assignees: United Microelectronics Corp.
- Applicants: United Microelectronics Corp.
- Inventors: Chih-Yuan Ho
- Web page: https://patentgrep.com/patent/US8772907B1

## CPC

- H10W 20/491: {Antifuses, i.e. interconnections changeable from non-conductive to conductive}
- H10W 20/01: {Manufacture or treatment}
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

An anti-fuse structure includes a substrate having at least a shallow trench isolation formed therein, a notch formed between the substrate and the STI, an electrode structure formed on the substrate, the electrode structure filling the notch, and a doped region formed in the substrate on a side of the electrode structure opposite to the notch.

## Claims

### Claim 1

An anti-fuse structure comprising:
a substrate having at least a shallow trench isolation (STI) formed therein;
a notch formed between the substrate and the STI;
a electrode structure formed on the substrate, the electrode structure filling the notch; and
a doped region formed in the substrate on a side of the electrode structure opposite to the notch.

### Claim 2 (depends on 1)

The anti-fuse structure according to claim 1, wherein the electrode structure comprising a conductive layer and an insulating layer.

### Claim 3 (depends on 2)

The anti-fuse structure according to claim 2, wherein the insulating layer comprises a variable thickness.

### Claim 4 (depends on 2)

The anti-fuse structure according to claim 2, wherein the insulating layer extends into the notch.

### Claim 5 (depends on 1)

The anti-fuse structure according to claim 1, wherein the electrode structure covers a portion of the STI.

### Claim 6

An anti-fuse programming method comprising:
providing an anti-fuse structure, and the anti-fuse structure comprising:
a substrate having at least a STI formed therein;
a notch formed between the substrate and the STI;
an electrode structure formed on the substrate, the electrode structure filling the notch; and
a doped region formed in the substrate on a side of the electrode structure opposite to the notch;
providing a programming voltage to the anti-fuse structure; and
forming a rupture point located at the notch.

### Claim 7 (depends on 6)

The anti-fuse programming method according to claim 6, wherein the electrode structure comprising a conductive layer and an insulating layer.

### Claim 8 (depends on 7)

The anti-fuse programming method according to claim 7, wherein the insulating layer comprises a variable thickness.

### Claim 9 (depends on 7)

The anti-fuse programming method according to claim 7, wherein the insulating layer extends into the notch.

### Claim 10 (depends on 6)

The anti-fuse programming method according to claim 6, wherein the electrode structure covers a portion of the STI.