# US 8,772,891 B2 · Lateral overflow drain and channel stop regions in image sensors

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- Number: US 8,772,891 B2
- Document ID: US8772891B2
- Status: Granted
- Kind: B2
- Application number: 12/609,257
- Filed: 2009-10-30
- Published: 2010-06-10
- Granted: 2014-07-08
- Earliest claimed: 2008-12-10
- Assignees: Truesense Imaging, Inc.
- Applicants: Edmund K. Banghart; Eric G. Stevens; Hung Q. Doan
- Inventors: Edmund K. Banghart; Eric G. Stevens; Hung Q. Doan
- Web page: https://patentgrep.com/patent/US8772891B2

## CPC

- H10F 39/158: {having arrangements for blooming suppression}
- H10F 39/011: {Manufacture or treatment of image sensors covered by group H10F39/12}
- H10F 39/1865: {Overflow drain structures}
- H10F 39/1945: {Overflow drain structures}
- H10F 39/1536: {Frame transfer}
- H10F: INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION

## Abstract

A lateral overflow drain and a channel stop are fabricated using a double mask process. Each lateral overflow drain is formed within a respective channel stop. Due to the use of two mask layers, one edge of each lateral overflow drain is aligned, or substantially aligned, with an edge of a respective channel stop.

## Claims

### Claim 1

A method of forming a lateral overflow drain and a channel stop associated with a pixel of an image sensor, the pixel comprising one or more shift elements for the accumulation of charge carriers in response to exposure to light, the method comprising:
forming a first mask layer over a semiconductor layer;
removing a portion of the first mask layer, thereby forming a first opening;
forming a second mask layer over the first mask layer;
removing a portion of the second mask layer to form a second opening disposed entirely within and sharing a boundary with the first opening, a width of the first opening being larger than a width of the second opening;
introducing dopants having a first conductivity type into the semiconductor layer through the first opening, thereby forming a channel stop for preventing movement of charge carriers from the one or more shift elements into a second pixel adjacent to the pixel;
introducing dopants having a second conductivity type opposite the first conductivity type into the semiconductor layer through only (i) the second opening and (ii) any portion of the first opening in which the second opening is disposed, thereby forming a lateral overflow drain for draining excess charge carriers from the one or more shift elements,
wherein the lateral overflow drain is disposed within and substantially shares a boundary with the channel stop.

### Claim 2 (depends on 1)

The method of claim 1, further comprising removing remaining portions of the first and second mask layers.

### Claim 3 (depends on 1)

The method of claim 1, further comprising forming a field oxide region over the channel stop.

### Claim 4 (depends on 1)

The method of claim 1, wherein the channel stop is formed before the second opening is formed.

### Claim 5 (depends on 1)

The method of claim 1, wherein the lateral overflow drain is formed before the channel stop is formed.

### Claim 6 (depends on 1)

The method of claim 1, wherein at least one of (i) the dopants having the first conductivity type or (ii) the dopants having the second conductivity type are introduced into the semiconductor layer through an insulating layer disposed over the semiconductor layer.

### Claim 7 (depends on 1)

The method of claim 1, wherein the semiconductor layer comprises a semiconductor-based substrate.

### Claim 8 (depends on 1)

The method of claim 1, further comprising forming an insulating layer over the semiconductor layer.

### Claim 9 (depends on 8)

The method as set forth in claim 8, wherein the insulating layer includes an oxide layer over the semiconductor layer, a nitride layer over the oxide layer, and another oxide layer over the nitride layer.

### Claim 10 (depends on 1)

The method of claim 1, wherein the lateral overflow drain and the channel stop each include a terminal edge at the boundary, the terminal edge of the lateral overflow drain being buried in the semiconductor layer and aligned with the terminal edge of the channel stop.