# US 8,772,863 B2 · Nonvolatile semiconductor memory transistor, nonvolatile semiconductor memory, and method for manufacturing nonvolatile semiconductor memory

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- Number: US 8,772,863 B2
- Document ID: US8772863B2
- Status: Granted
- Kind: B2
- Application number: 14/138,910
- Filed: 2013-12-23
- Published: 2014-05-01
- Granted: 2014-07-08
- Earliest claimed: 2010-06-10
- Assignees: Unisantis Electronics Singapore Pte. Ltd.
- Applicants: Unisantis Electronics Singapore Pte. Ltd.
- Inventors: Fujio Masuoka; Hiroki Nakamura
- Web page: https://patentgrep.com/patent/US8772863B2

## CPC

- H10D 30/6892: {having at least one additional gate other than the floating gate and the control gate, e.g. program gate, erase gate or select gate}
- H10B 41/27: the channels comprising vertical portions, e.g. U-shaped channels
- H10B 41/30: characterised by the memory core region
- H10D 30/0411: {of FETs having floating gates}
- H10D 30/68: Floating-gate IGFETs
- H10D 30/689: {Vertical floating-gate IGFETs}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10B: ELECTRONIC MEMORY DEVICES

## Abstract

A nonvolatile semiconductor memory transistor included in a nonvolatile semiconductor memory includes an island-shaped semiconductor having a source region, a channel region, and a drain region formed in this order from the substrate side, a hollow pillar-shaped charge storage layer arranged so as to surround the outer periphery of the channel region in such a manner that a tunnel insulating film is interposed between the charge storage layer and the channel region, and a hollow pillar-shaped control gate arranged so as to surround the outer periphery of the charge storage layer in such a manner that an insulating film is interposed between the control gate and the charge storage layer. The insulating film is arranged so as to be interposed between the charge storage layer and the upper, lower, and inner side surfaces of the control gate.

## Claims

### Claim 1

A nonvolatile semiconductor memory transistor comprising:
an island-shaped semiconductor having a source region, a channel region, and a drain region in order from surface of a substrate;
a hollow pillar-shaped charge storage layer surrounding an outer periphery of the channel region and a tunnel insulating film between the charge storage layer and the channel region, the hollow pillar-shaped charge storage layer having a circumferential recess therein; and
a hollow pillar-shaped control gate surrounding an outer periphery of the charge storage layer and at least partially within the circumferential recess; and
an insulating film residing in the circumferential recess between the control gate and the charge storage layer,
wherein the insulating film resides between the charge storage layer and an upper surface, a lower surface, and a lateral side surface of the control gate,
wherein the control gate faces the charge storage layer in the recess and the lateral side surface of the control gate does not face the island-shaped semiconductor in a vertical direction, and
wherein the upper surface of the charge storage layer does not face the island-shaped semiconductor in the vertical direction.

### Claim 2 (depends on 1)

The nonvolatile semiconductor memory transistor according to claim 1, further comprising a first insulating film on the substrate below the charge storage layer, wherein the first insulating film has a thickness that is greater than a thickness of at least one of the tunnel oxide film and the insulating film.

### Claim 3 (depends on 1)

A nonvolatile semiconductor memory comprising the nonvolatile semiconductor memory transistor according to claim 1,
wherein the nonvolatile semiconductor memory transistor includes a plurality of nonvolatile semiconductor memory transistors in a row direction among row and column directions of the substrate, and
wherein a drain region of at least one of the plurality of nonvolatile semiconductor memory transistors is electrically connected to a second source line in a column direction among the row and column directions of the substrate.