# US 8,772,832 B2 · GaN HEMTs with a back gate connected to the source

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- Number: US 8,772,832 B2
- Document ID: US8772832B2
- Status: Granted
- Kind: B2
- Application number: 13/109,212
- Filed: 2011-05-17
- Published: 2012-08-23
- Granted: 2014-07-08
- Earliest claimed: 2010-06-04
- Assignees: HRL Laboratories, LLC
- Applicants: Karim S Boutros
- Inventors: Karim S Boutros
- Web page: https://patentgrep.com/patent/US8772832B2

## CPC

- H10D 30/4732: {using Group III-V semiconductor material}
- H10D 30/015: {of FETs having heterojunction interface channels or heterojunction gate electrodes, e.g. HEMT}
- H10D 62/117: {Shapes of semiconductor bodies}
- H10D 64/254: {for lateral devices wherein the source or drain electrodes extend entirely through the semiconductor bodies, e.g. via-holes for back side contacts}
- H10D 62/8503: {Nitride Group III-V materials, e.g. AlN or GaN}
- H10D 64/111: {Field plates}
- H10D 64/257: {for lateral devices wherein the source or drain electrodes are characterised by top-view geometrical layouts, e.g. interdigitated, semi-circular, annular or L-shaped electrodes (source or drain electrodes of TFTs H10D30/673)}
- H10D: INORGANIC ELECTRIC SEMICONDUCTOR DEVICES

## Abstract

The present invention reduces the dynamic on resistance in the channel layer of a GaN device by etching a void in the nucleation and buffer layers between the gate and the drain. This void and the underside of the device substrate may be plated to form a back gate metal layer. The present invention increases the device breakdown voltage by reducing the electric field strength from the gate to the drain of a HEMT. This electric field strength is reduced by placing a back gate metal layer below the active region of the channel. The back gate metal layer may be in electrical contact with the source or drain.

## Claims

### Claim 1

A HEMT device comprising:
a substrate, a buffer layer, a channel layer, and a barrier layer;
a source, a gate, and a drain disposed on the barrier layer;
a void in the buffer layer and substrate below an active region between the gate and the drain;
a back gate metal layer disposed on an underside of the substrate;
the source is electrically connected to the back gate metal layer;
a conductive plating on the surfaces of the substrate and buffer layer exposed by the void below the active region between the gate and drain.

### Claim 2 (depends on 1)

The device of claim 1 further comprising a nucleation layer between the substrate and the buffer layer; the nucleation layer comprising a void in the active region between the gate and the drain.

### Claim 3 (depends on 1)

The device of claim 1 wherein the conductive plating comprises metal.

### Claim 4 (depends on 1)

The device of claim 1 wherein the conductive plating is electrically connected to the back gate metal layer.

### Claim 5 (depends on 1)

The device of claim 1 wherein the channel layer comprises a combination of a Group III and a Group V material

### Claim 6 (depends on 5)

The device of claim 5 wherein the channel layer comprises GaN.

### Claim 7 (depends on 1)

The device of claim 1 further comprising an insulating cap layer.

### Claim 8

A method of forming a HEMT device comprising:
receiving a substrate with a buffer layer, a channel layer, a barrier layer formed on a top side of the substrate thereon;
forming a source, a drain and a gate on the barrier layer;
etching the underside of the substrate through the buffer layer to form a void in a region between the gate and the drain;
forming a back gate metal layer on the underside of the substrate, on an underside of the channel layer and on edges of the nucleation layer and buffer layer exposed by the formation of the void in the region between the gate and drain.

### Claim 9 (depends on 8)

The method of claim 8 wherein the device further comprises a nucleation layer between the substrate and the buffer layer and wherein the void extends through the nucleation layer.

### Claim 10 (depends on 8)

The method of claim 8 further comprising forming a source field plate on the HEMT device connected to the source and connected to the back gate metal layer.

### Claim 11 (depends on 8)

The method of claim 8 wherein the channel layer comprises GaN.