# US 8,772,810 B2 · Semiconductor light emitting device and method for manufacturing the same

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- Number: US 8,772,810 B2
- Document ID: US8772810B2
- Status: Granted
- Kind: B2
- Application number: 13/601,487
- Filed: 2012-08-31
- Published: 2013-09-26
- Granted: 2014-07-08
- Earliest claimed: 2012-03-26
- Assignees: Kabushiki Kaisha Toshiba
- Applicants: Yoshiaki Sugizaki; Akihiro Kojima; Hideto Furuyama; Yosuke Akimoto
- Inventors: Yoshiaki Sugizaki; Akihiro Kojima; Hideto Furuyama; Yosuke Akimoto
- Web page: https://patentgrep.com/patent/US8772810B2

## CPC

- H10H 20/8585: {being an interconnection}
- H10H 20/8314: {extending at least partially onto an outer side surface of the bodies}
- H10H 20/8512: {Wavelength conversion materials}
- H10H 20/01: Manufacture or treatment
- H10H 20/032: {of electrodes}
- H10H 20/819: characterised by their shape, e.g. curved or truncated substrates
- H10H 20/8514: {characterised by their shape, e.g. plate or foil}
- H10W 90/00: Package configurations
- H10H: INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10W: GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10

## Abstract

According to one embodiment, a semiconductor light emitting device includes: a semiconductor layer including a first face, a second face, a side face, and a light emitting layer; a p-side electrode provided on the second face; an n-side electrode provided on the side face; a first p-side metal layer provided on the p-side electrode; a first n-side metal layer provided on the periphery of the n-side electrode; a first insulating layer provided on a face on the second face side in the first n-side metal layer; a second p-side metal layer connected with the first p-side metal layer on the first p-side metal layer, and provided, extending from on the first p-side metal layer to on the first insulating layer; and a second n-side metal layer provided on a face on the second face side in the first n-side metal layer in a peripheral region of the semiconductor layer.

## Claims

### Claim 1

A semiconductor light emitting device, comprising:
a semiconductor layer including a first face, a second face opposite to the first face, a side face, and a light emitting layer;
a p-side electrode provided on the second face;
an n-side electrode provided on the side face;
a first p-side metal layer provided on the p-side electrode and connected electrically with the p-side electrode;
a first n-side metal layer provided in a region peripheral to the semiconductor layer and connected electrically with the n-side electrode, the first n-side metal layer having a first portion and a second portion that are at opposite sides of the first p-side metal layer;
a first insulating layer provided on the first portion of the first n-side metal layer;
a second p-side metal layer provided on the first p-side metal layer and connected electrically with the first p-side metal layer, the second p-side metal layer overlapping the first portion of the first n-side metal layer via the first insulating layer in a direction perpendicular to the first face; and
a second n-side metal layer provided on the second portion of the first n-side metal layer, the second n-side metal layer connected electrically to the first n-side metal layer.

### Claim 2 (depends on 1)

The device according to claim 1, further comprising:
a third p-side metal layer provided on the second p-side metal layer and being thicker than the second p-side metal layer; and
a third n-side metal layer provided on the second n-side metal layer and being thicker than the second n-side metal layer.

### Claim 3 (depends on 2)

The device according to claim 2, further comprising a second insulating layer provided on a side face of the third p-side metal layer and a side face of the third n-side metal layer.

### Claim 4 (depends on 1)

The device according to claim 1, further comprising a phosphor layer provided on the first face.

### Claim 5 (depends on 4)

The device according to claim 4, wherein the phosphor layer extends into the region peripheral to the semiconductor layer.

### Claim 6 (depends on 4)

The device according to claim 4, wherein a part of the n-side electrode protrudes from the side face beyond the first face, and surrounds a periphery of the phosphor layer on the first face.

### Claim 7 (depends on 6)

The device according to claim 6, wherein the first n-side metal layer connected electrically with the n-side electrode is also provided on a periphery of the part of the n-side electrode.

### Claim 8 (depends on 1)

The device according to claim 1, wherein the first p-side metal layer covers the whole region of a light emitting region including the light emitting layer.

### Claim 9 (depends on 1)

The device according to claim 1, wherein:
the device includes a plurality of the semiconductor layers separated from each other; and
the n-side electrodes provided on the side faces between the plurality of semiconductor layers are connected electrically with each other.

### Claim 10 (depends on 9)

The device according to claim 9, wherein the first n-side metal layer is provided between adjacent side faces of the plurality of semiconductor layers.

### Claim 11 (depends on 10)

The device according to claim 10, wherein the first n-side metal layer surrounds continuously a periphery of each of the semiconductor layers.

### Claim 12 (depends on 9)

The device according to claim 9, wherein a surface of the n-side electrode provided between adjacent side faces of the plurality of semiconductor layers is covered with an insulating film and, on the insulating film, the first p-side metal layer is provided.

### Claim 13 (depends on 9)

The device according to claim 9, wherein the first p-side metal layer is provided continuously between the plurality of semiconductor layers.

### Claim 14 (depends on 9)

The device according to claim 9, wherein the second p-side metal layer is provided continuously between the plurality of semiconductor layers.

### Claim 15 (depends on 1)

The device according to claim 1, further comprising a varistor provided between the first n-side metal layer and the second p-side metal layer in the peripheral region, the varistor having a first electrode connected electrically with the first n-side metal layer and a second electrode connected electrically with the second p-side metal layer.

### Claim 16 (depends on 1)

The device according to claim 1, wherein the first n-side metal layer surrounds continuously a periphery of the n-side electrode.

### Claim 17 (depends on 1)

The device according to claim 1, wherein the first n-side metal layer is thicker than the semiconductor layer.